Fuse box semiconductor device

Details Fuse box semiconductor device Fuse box semiconductor device

2006-03-07

2006-03-07

Nelms, David (Department: 2818)

Active solid-state devices (e.g., transistors, solid-state diode

Integrated circuit structure with electrically isolated...

Passive components in ics

C257S530000

Reexamination Certificate

active

07009274

ABSTRACT:
A fuse box includes a semiconductor substrate having a fuse region, and a lower line in the fuse region that has a first region and a second region. An upper line is placed on the upper part of the lower line to overlap the first region. A fuse is placed on the upper part of the upper line, and connects electrically to the second region of the lower line and the upper surface of the upper line. A lower interlayer insulating layer is interposed between the lower line and the upper line, and an upper interlayer insulating layer is interposed between the upper line and the fuse. The fuse is formed on the upper interlayer insulating layer. Both ends of the fuse connect electrically to the second region of the lower line and the upper line, respectively, through fuse holes penetrating the lower and upper interlayer insulating layers.

REFERENCES:
patent: 5389814 (1995-02-01), Srikrishnan et al.
patent: 2002/0014680 (2002-02-01), Tottori

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