Furnace for testing integrated circuits

Thermal measuring and testing – Thermal testing of a nonthermal quantity – Of susceptibility to thermally induced deteriouration – flaw,...

Reexamination Certificate

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C324S760020

Reexamination Certificate

active

06213636

ABSTRACT:

BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to a furnace for testing integrated circuits, more particularly, to a furnace which injects low-temperature air and pours cooling liquid therein when the test is complete thereby quickly cooling down the temperature inside the furnace to avoid damaging the integrated circuits undergoing test.
2. Description of Related Art
The integrated circuits have to be tested after being produced to eliminate the defective ones and ensure their quality. Generally, two environmental tests, Pressure Cooker Test (PCT) and Highly Accelerated Stress Test (HAST), have to be performed on the integrated circuits. Usually, the PCT test is executed under an environment of 121° C./100% RH/29.7 PSI and the HAST test is executed under an environment of 130° C./85% RH/33.3 PSI. Both of the test environments are of high-temperature, high-humidity and high-pressure. The conventional method for the PCT furnace and the HAST furnace only turns off the heater and open the water outlet valve and air exhaust valve to let it cool down naturally after the test is complete. At the end of the test, both the temperature and humidity in the furnace are still very high and drop slowly, therefore the integrated circuits are in an idle-burning state. Moreover, it is easy to generate condensation inside the furnace and on the integrated circuits in such a cool-down process. Because of the above idle-burning and condensation-generation phenomenon, the integrated circuits are likely to be damaged; for example, water-spots and color-veins may be generated on the plastic packages thereof and the leads thereof may be blackened. The damaged integrated circuits have lots of problems such as bad conductivity, open circuits or broken leads.
SUMMARY OF THE INVENTON
Therefore it is the object of the present invention to provide a furnace for testing integrated circuits, which is able to quickly lower the temperature in the furnace when the test is complete thereby avoiding damage to the integrated circuits.
A furnace for testing integrated circuits in accordance with the present invention comprises a furnace body, a water outlet pipe, an air exhaust pipe, an air supply pipe and a liquid inlet pipe. The air supply pipe is automatically opened when the test is complete thereby injecting low-temperature air into the furnace body. The liquid inlet pipe is automatically opened when the test is complete thereby pouring cooling liquid into the furnace body.
Other objects, advantages, and novel features of the invention will become more apparent from the following detailed description when taken in conjunction with the accompanying drawings.


REFERENCES:
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patent: 3648167 (1972-03-01), Purdy et al.
patent: 4520312 (1985-05-01), Tarng et al.
patent: 4954774 (1990-09-01), Binet
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patent: 5039228 (1991-08-01), Chalmers
patent: 5193910 (1993-03-01), Kinoshita
patent: 5318361 (1994-06-01), Chase et al.
patent: 5723796 (1998-03-01), Nielsen
patent: 5746512 (1998-05-01), Yao et al.
patent: 59-161833 (1984-09-01), None
patent: 59-181076 (1984-10-01), None
patent: 60-33031 (1985-02-01), None
patent: 63-50769 (1988-03-01), None
TDB-Acc-No; NN 81091842; IBM Technical Disclosure Bulletin; “Highly Accelerated Stress Test” vol. 24, No. 4, pp. 1842-1843, Sep., 1981.*
TDB-Acc-No; NA9006308; IBM Technical Disclosure Bulletin, vol. 33, No. 1A, p. 308 Gas Jet Manifold for Module Cooling in Belt-Type Chip-Joining, Furnace; Jun. 1990.

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