Electronic digital logic circuitry – Multifunctional or programmable – Having details of setting or programming of interconnections...
Reexamination Certificate
1997-07-29
2003-02-04
Tokar, Michael (Department: 2819)
Electronic digital logic circuitry
Multifunctional or programmable
Having details of setting or programming of interconnections...
C326S039000, C326S016000, C326S105000
Reexamination Certificate
active
06515505
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention pertains to circuit functionality changes and more particularly to changing the function of integrated circuit chips by changing interconnections.
2. Related Prior Art
Presently in the prior art, there are several methods for modifying the function of an integrated circuit chip. For example, various circuits may be separated by burning through laser or chemical means. By this method portions of an integrated circuit may be isolated similar to the manner in which bad memory cells may be isolated in a DRAM. However, the prior art methods must take place prior to the sealing of the chip in its casing.
In present integrated circuit chips, there are pads that may be connected to bond wires that electrically connect the chip to the package or substrate on which the chip is mounted. A pad on an integrated circuit chip may or may not have a bond wire connecting the pad to VCC or ground or any other electrical signal when the integrated circuit chip is placed in the package.
FIG. 1
is an illustration of the possible connection of a pad to an external signal. Pad
12
is illustrated as having a bond wire
14
connected to ground. Pad
12
is connected internally to an input buffer illustrated as inverter
16
through wire
18
. Wire
18
is also connected to Vcc at node
20
through resistor
22
.
The circuitry connected to pad
12
is normally biased in the opposite voltage to that which bond wire
14
may connect it to. That is, the input circuitry connected to pad
12
may see pad
12
as connected to ground if bond wire
14
is used, otherwise the circuitry will see the pad as connected to V
CC
at node
20
. Many devices use this sort of technique.
This technique, although used for this purpose also has potential to provide additional benefits that can result in less required inventory and fewer manufacturing lines. In the prior art, the technique has been used to select between two modes. For example, between the normal operating mode of the chip and a special mode which could be used for testing. Alternatively, it has been used to select between two different operating modes of a chip with slightly different functionality. For example, the chip may have a chip enable mode which turns off the outputs but can also be selected to power down the internal logic.
SUMMARY OF THE INVENTION
The present invention provides a method and apparatus for selecting the functionality or changing the functionality from many different alternatives in an integrated circuit chip. This method includes bonding pads by which the particular functionality of the chip may be selected by bonding out particular pads or not bonding out particular pads. These bonding pads are connected to a decoder circuit located on the integrated circuit chip itself The decoder circuit determines, depending on which of the bonding pads have been bonded out, which path of a predetermined number of paths is to be chosen to provide the selected function. In the preferred embodiment there are four bond pads. From these four bond pads, sixteen possible combinations are possible. The decoder circuit determines which of these sixteen possible options has been selected and feeds this information to a circuit which generates control signals in response to the selected option. The control signals are fed to logic circuits in predetermined portions of the remainder of the integrated circuit chip. The logic circuits control functions of sub-circuits within the various portions of the integrated circuit chip. By determining the function of the sub-circuits, the overall functionality of the integrated circuit chip is dictated.
REFERENCES:
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patent: 5084635 (1992-01-01), Toda et al.
patent: 5161124 (1992-11-01), Love
patent: 5353250 (1994-10-01), McAdams
patent: 5402018 (1995-03-01), Koyanagi
Mano,Computer Engineering: Hardware Design. Prentice Hall: Englewood Cliffs, NJ. pp. 96-99, 1988.
Christopher P. Maiorana P.C.
Cypress Semiconductor Corp.
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