Functional random instruction testing (FRIT) method for...

Error detection/correction and fault detection/recovery – Data processing system error or fault handling – Reliability and availability

Reexamination Certificate

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C714S733000

Reexamination Certificate

active

06948096

ABSTRACT:
A functional random instruction testing (FRIT) method is provided for testing complex devices. The method comprises the steps of: generating a FRIT kernel which includes a software built-in self-test engine (SBE) configured to execute a re-generative functional test of the complex device under test (DUT), and an expected test result obtained from computer modeling of a complex device under test (DUT) or from a known good device; converting the FRIT kernel into kernel test patterns and storing the kernel test patterns in a tester memory; loading, at the tester, the kernel test patterns stored in the tester memory onto an on-board memory of the complex device under test (DUT), via an interface; executing, at the complex device under test (DUT), a re-generative functional test of the complex device under test (DUT) by applying the kernel test patterns to the complex device under test (DUT); and comparing, at the tester, a test result of the re-generative functional test with a test expected result to check for manufacturing defects.

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patent: 2002/0093356 (2002-07-01), Williams et al.
Native mode functional test generation for processors with applications to self test and design validation; Jian Shen; Abraham, J.A.; Test Conference, Proceedings. International, Oct. 18-23, 1998; pp.: 990-999□□.
Shen et al., Native Mode Functional Test Generation for Processors with Applications to Self Test and Design Validation, Test Conference, Proceedings. International, Oct. 18-23, 1998, Page(s): 990-999 □□.
Chen et al., Software-Based Self-Testing Methodology for Processor Cores, Mar. 2001, vol.: 20 , Issue: 3, On page(s): 369-380.

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