Electrical computers and digital data processing systems: input/ – Input/output data processing – Direct memory accessing
Reexamination Certificate
2005-09-29
2009-11-17
Patel, Niketa (Department: 2181)
Electrical computers and digital data processing systems: input/
Input/output data processing
Direct memory accessing
C710S007000, C710S020000
Reexamination Certificate
active
07620746
ABSTRACT:
In one embodiment, a direct memory access (DMA) controller comprises a transmit control circuit, an offload engine, and a receive control circuit. The transmit control circuit is configured to read first DMA data from an address space in a host. Coupled to receive the first DMA data from the transmit control circuit, the offload engine is configured to perform at least a first operation on the first DMA data to produce a result. The offload engine is configured to at least start performing the first operation during a DMA transfer that provides the first DMA data to the offload engine. Coupled to the offload engine to receive the result, the receive control circuit is configured to write the result to the address space in the host according to a DMA descriptor data structure that describes the DMA transfer.
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Chen Zongjian
Go Dominic
Hayter Mark D.
Ku Weichun
Apple Inc.
Franklin Richard
Merkel Lawrence J.
Meyertons Hood Kivlin Kowert & Goetzel P.C.
Patel Niketa
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