Electronic digital logic circuitry – Multifunctional or programmable – Array
Reexamination Certificate
2005-08-30
2008-03-25
Cho, James (Department: 2819)
Electronic digital logic circuitry
Multifunctional or programmable
Array
C326S093000
Reexamination Certificate
active
07348797
ABSTRACT:
Hardware cells inside of an IC device, such as in a processor circuit, for characterization that replace functional flip-flops that capture inputs or drive outputs in the device. The cells are circuits that are used, in conjunction with a software method, to generate test programs for testing exact I/O transitions for timing measurements at various operating conditions.
REFERENCES:
patent: 5649176 (1997-07-01), Selvidge et al.
patent: 6266801 (2001-07-01), Jin
patent: 6446230 (2002-09-01), Chung
patent: 6658632 (2003-12-01), Parulkar et al.
patent: 2007/0050737 (2007-03-01), Weinraub
Brady W. James
Cho James
Crawford Jason
Shaw Steven A.
Telecky , Jr. Frederick J.
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