Function symmetry-based optimization for physical synthesis...

Details Function symmetry-based optimization for physical synthesis... Function symmetry-based optimization for physical synthesis...

2007-11-01

2010-10-12

Siek, Vuthe (Department: 2825)

Computer-aided design and analysis of circuits and semiconductor

Nanotechnology related integrated circuit design

C716S030000

Reexamination Certificate

active

07814452

ABSTRACT:
A computer-implemented method of technology mapping a circuit design for implementation within a programmable logic device can include determining a plurality of cut sets for the circuit design, wherein each cut set includes a plurality of cuts. The method can include evaluating each cut set according to a cost function that depends, at least in part, upon a measure of inter-cut symmetry and selecting a cut set according to the cost function. Each cut of the selected cut set can represent an instantiation of at least one logic component within the programmable logic device. The circuit design specifying the selected cut set can be output.

REFERENCES:
patent: 2001/0028257 (2001-10-01), Kaptanoglu
patent: 2006/0031730 (2006-02-01), Hsiao et al.
patent: 2006/0117280 (2006-06-01), Wallace
Ling et al., “BddCut: Towards Scalable Symbolic Cut Enumeration,” IEEE, Jul. 2007, pp. 408-413.
Firusabad et al., “A Novel Approach to Determine Minimal Tie-Sets of Complex Network,” IEEE, Mar. 2004, pp. 61-70.
Xilinx, Inc.; U.S. Appl. No. 11/981,910 by Tetse Jang et al.; filed Nov. 1, 2007.
Manohararajah, Valavan et al.; “Timing Driven Functional Decomposition for FPGAs”; IWLS, Lake Arrowhead, CA; Jun. 2005; pp. 415-422.
Chen, Deming et al.; “DAOmap: A Depth-Optimal Area Optimization Mapping Algorithm for FPGA Designs”; Copyright 2004 IEEE; pp. 752-759.
Mischenko, Alan et al.; “Improvements to Technology Mapping for LUT-Based FPGAs”; IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems; vol. 26, No. 2; Feb. 2007; Copyright 2007 IEEE; pp. 240-253.
Lai, Yung-Te et al.; “BDD Based Decomposition of Logic Functions with Application to FPGA Synthesis”; 30th ACM/IEEE Design Automation Conference; Copyright 1993 ACM; pp. 642-647.
Stanion, Ted et al.; A Method for Finding Good Ashenhurst Decompositions and Its Application to FPGA Synthesis: 32nd ACM/IEEE Design Automation Conference; Copyright 1995 ACM; pp. 1-5.
Jiang, Jie-Hong et al.; “Unified Functional Decomposition via Encoding for FPGA Technology Mapping”; IEEE Transactions on Very Large Scale Integration (VLSI) Systems; vol. 9, No. 2; Apr. 2001; Copyright 2001 IEEE; pp. 251-260.
David Dye; “Physical Synthesis and Optimization with ISE 9.1i”; White Paper: Virtex and Spartan FPGAs; WP230 (v1.1); May 16, 2007; available from www.Xilinx.com; pp. 1-9.
Singh, Deshanand P. et al.; “Two-Stage Physical Synthesis for FPGAs”; IEEE 2005 Custom Integrated Circuits Conference; Copyright 2005 IEEE; pp. 171-178.
Manohararajah, Valavan et al.; Heuristics for Area Minimization in LUT-Based FPGA Technology Mapping; IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems; vol. 25, No. 11; Nov. 2006; Copy right 2006 IEEE; pp. 2331-2340.
Ding, Yuzheng et al.; “The Effect of Post-Layout Pin Permutation on Timing”; FPGA '05; Feb. 20-22, 2005; Copyright 2005 ACM; pp. 41-50.
Suaris, Peter et al.; “Incremental Physical Resynthesis for Timing Optimization”; FPGA '04; Feb. 22-24, 2004; Copyright 2004 ACM; pp. 99-108.
Zhang, Jin S. et al.; “Symmetry Detection for Large Boolean Functions Using Circuit Representation, Simulation, and Satisfiability”; Design Automation Conference 2006; 43rd ACM/IEEE; Jul. 24-28, 2006; pp. 510-515.

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