Active solid-state devices (e.g. – transistors – solid-state diode – Field effect device – Having insulated electrode
Reexamination Certificate
2007-11-13
2007-11-13
Chaudhari, Chandra (Department: 2891)
Active solid-state devices (e.g., transistors, solid-state diode
Field effect device
Having insulated electrode
C257S413000, C257SE29161
Reexamination Certificate
active
11071768
ABSTRACT:
A method is described to form a MOSFET with a fully silicided gate electrode and fully silicided, raised S/D elements that are nearly coplanar to allow a wider process margin when forming contacts to silicided regions. An insulator block layer is formed over STI regions and a conformal silicidation stop layer such as Ti/TiN is disposed on the insulator block layer and active region. A polysilicon layer is deposited on the silicidation stop layer and is planarized by a CMP process to form raised S/D elements. An oxide hardmask on the gate electrode is removed to produce a slight recess between the spacers. A silicidation process yields a gate electrode and raised S/D elements comprised of NiSi. Optionally, a recess is formed in the substrate between an insulator block mask and spacer and a Schottky barrier is used instead of a silicidation stop layer to form a Schottky Barrier MOSFET.
REFERENCES:
patent: 5960270 (1999-09-01), Misra et al.
patent: 6204103 (2001-03-01), Bai et al.
patent: 6284609 (2001-09-01), Ang et al.
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“Issues in NiSi-gated FOSOI device integretion”, by J. Kedzierski et al. 2003 IEEE.
Balasubramanian Narayanan
Lo Patrick Guo Qiang
Loh Wei Yip
Nagarajan Ranganathan
Ackerman Stephen B.
Agency for Science Technology and Research
Chaudhari Chandra
Saile Ackerman LLC
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