Fully ion implanted junction field effect transistor

Details Fully ion implanted junction field effect transistor Fully ion implanted junction field effect transistor

1986-05-07

1987-06-02

Buczinski, Stephen C.

Adhesive bonding and miscellaneous chemical manufacture

Delaminating processes adapted for specified product

Delaminating in preparation for post processing recycling step

156643, 156645, 357 15, 357 67, H01L 2980, H01L 2964

Patent

active

H00002917

ABSTRACT:
A method of making a planar junction field-effect transistor in which a semi-insulating substrate of a III-V semiconductor, particularly InP, is ion implanted by two ions to produce both an n-type region and a p-type region. The gate is further defined by selectively etching through the gate-implant region to the source/drain channel.

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J. B. Boos et al., Fully Implanted InP Junction FET's, IEEE Electron Device etters, vol. EDL-3, pp. 256-258, 1982.
K. J. Sleger et al., Low Noise Ion Implanted InP FET's IEEE Transactions of Electron Devices, vol. ED-28, pp. 1031-1034, 1981.
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