Frequency synthesis loop having controlled loop gain

Details Frequency synthesis loop having controlled loop gain Frequency synthesis loop having controlled loop gain

2006-10-24

2006-10-24

Ha, Dac V. (Department: 2611)

Pulse or digital communications

Synchronizers

Phase displacement, slip or jitter correction

C375S296000, C332S123000, C332S127000, C332S162000

Reexamination Certificate

active

07127020

ABSTRACT:
A method and apparatus for generating a burst FSK signal having precisely shaped transitions between modulation states. The apparatus uses feedforward compensation of phase gain and phase preemphasis coefficients for compensating the frequency conversion gain of the apparatus, and the phase gain coefficient is used for stabilizing a frequency synthesis loop. The phase gain and preemphasis coefficients are determined in a calibration within the time constraints of on-line signal bursts based upon measured phase errors and accelerated predicted phase gain and preemphasis phase errors.

REFERENCES:
patent: 6275685 (2001-08-01), Wessel et al.
patent: 6384677 (2002-05-01), Yamamoto
patent: 2003/0109234 (2003-06-01), Shi
David Redmond, Morgan Fitzgibbon, Alan Bannon, Darren Hobbs, Chunhe Zhao, Kiyoshi Kase, Joseph Chan, Michael Priel, Kevin Traylor & Keith Tilley, “A GSM/GPRS Mixed-Signal Baseband IC”, IEEE International Solid-State Circuits Conference, vol. 45, Session 3, Paper 3.6, Feb. 4, 2002.
Daniel R. McMahill & Charles G. Sodini, “Automatic Calibration of Modulated Frequency Synthesizers”, IEEE Transactions On Circuits and Systems—II: Analog and Digital Signal Processing, vol. 49, No. 5, pp. 301-311, May 2002.
Daniel R. McMahill & Charles G. Sodini, “A 2.5Mb/s GFSK 5.0-Mb/s 4-FSK Automatically Calibrated Σ-Δ Frequency Synthesizer”, IEEE Journal of Solid-State Circuits, vol. 37 No. 1, pp. 18-26, Jan. 2002.

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