Frequency synchronous circuit for obtaining original clock signa

Details Frequency synchronous circuit for obtaining original clock signa Frequency synchronous circuit for obtaining original clock signa

1994-01-25

1995-10-17

Pascal, Robert J.

Oscillators

Automatic frequency stabilization using a phase or frequency...

Afc with logic elements

331 14, 331 25, 375354, 375355, 375356, 327141, 327155, 327160, 327162, H03L 700

Patent

active

054594359

ABSTRACT:
A frequency synchronous circuit has a first counter unit, a second counter unit, a storage/average unit, and a comparison unit. The first counter unit is used to count a reference signal supplied from outside the frequency synchronous circuit during a sampling time which is defined by a sampling signal, and the second counter unit is used to count a synchronous clock signal to be output from the frequency synchronous circuit during the sampling time of the sampling signal. The storage/average unit, which is operatively connected to the first counter unit, is used to store and average an output signal of the first counter unit. The comparison unit, which is connected to the storage/average unit and the second counter unit, is used to compare an output signal of the storage/average unit with an output signal of the second counter unit, and the frequency synchronous circuit outputs the synchronous clock signal whose frequency is synchronized in accordance with an output signal of the comparison unit. Therefore, an original clock signal can be obtained and output by removing noise components from a clock signal which may include the noise components.

REFERENCES:
patent: 3676793 (1972-07-01), Brown
patent: 3893040 (1975-07-01), Harp
patent: 4716575 (1987-12-01), Douros et al.

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