Pulse or digital communications – Synchronizers – Phase displacement – slip or jitter correction
Patent
1997-02-27
2000-05-09
Chin, Stephen
Pulse or digital communications
Synchronizers
Phase displacement, slip or jitter correction
375355, 375372, 341 50, 341 61, 341123, 370516, 370503, 370545, 708290, 708300, 708313, H04L 2536, H04L 2540, H04L 700
Patent
active
060614102
ABSTRACT:
A communication system includes a data sampling rate converter that uses a closed-loop control arrangement to convert an input signal at a first sampling rate to a second, asynchronous, sampling rate without requiring extensive input buffering. A number of data registers in a first-in-first-out input buffer are used to receive and store data samples at the first rate and to pass the data samples from the input buffer at a controlled rate. The input buffer indicates the current capacity of the input buffer circuit for use by a frequency ratio estimation circuit, which is arranged to respond by providing an estimate of the actual ratio between the first rate and the second rate. A control circuit responds to the frequency ratio estimation circuit by generating the controlled rate at which the data samples are to be passed from the input buffer. In this manner, the data samples are passed from the input buffer at the controlled rate for processing and outputting the data at the second rate.
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Advanced Micro Devices
Chin Stephen
Maddox Michael W.
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