Pulse or digital communications – Synchronizers – Phase displacement – slip or jitter correction
Reexamination Certificate
1999-12-02
2002-05-28
Vo, Don N. (Department: 2631)
Pulse or digital communications
Synchronizers
Phase displacement, slip or jitter correction
C331S00100A, C331S065000, C327S155000
Reexamination Certificate
active
06396891
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to a frequency control apparatus and method which controls the frequency of an output signal thereof in synchronism with an externally input timing signal, and a storage medium storing a program for carrying out the method.
2. Prior Art
Conventionally, as a system for generating an output signal which is controlled in frequency in synchronism with an input signal applied thereto, a PLL (phase lock loop) is known. A typical PLL is essentially comprised of a phase comparator which compares the phase of an input signal and the phase of an output signal (regenerated clock signal), a loop filter which smoothes the output of the phase comparator, and a VCO (voltage controlled oscillator) which outputs the regenerated clock signal which varies in frequency in response to the output of the loop filter. Further, in the case of regenerating a sampling clock having a frequency of 44.1 kHz in synchronism with an input signal having a frequency of 1 kHz, for example, a frequency divider which reduces the frequency of 44.1 kHz of the regenerated clock to 1 kHz has to be provided in a feedback loop to the phase comparator.
In the conventional PLL, however, all the component elements are implemented by hardware, which leads to an increased number of component elements particularly where many frequency dividing steps are used, and hence a complicated construction. Moreover, in the conventional PLL, the input signal (data) entering response depends upon the time constant of the loop filter which cannot be easily changed. Consequently, if the input frequency is largely different from the output frequency (input frequency<<output frequency), it takes much time to enter the input signal. Further, in the conventional PLL, the component elements are selected for a particular input frequency/output frequency ratio. Therefore, the PLL cannot flexibly cope with input and output signals having a different frequency ratio.
Further, where the PLL is applied to an apparatus constructed such that a synchronizing signal as a timing signal is input from a personal computer or a like computer (hereinafter referred to as “PC”) and an internal VCO is controlled in synchronism with the input synchronizing signal, if the synchronizing signal is not supplied with the power supply to PC off or a bus disconnected, the output frequency changes, causing a change in the operative state of the apparatus which operates in synchronism with the synchronizing signal, and moreover, when the power supply to PC is again turned on, there occurs a large difference between the input frequency and the output frequency. As mentioned above, in the conventional PLL, the input signal (data) entering response depends upon the time constant of the loop filter, and further the time constant must be set to a rather large value so as to secure stability of the output frequency. Therefore, if there is a large difference between the input frequency and the output frequency, it takes much time to enter the input signal.
SUMMARY OF THE INVENTION
It is therefore a first object of the invention to provide a frequency control apparatus and method, which requires a simple circuit configuration and is capable of entering an input signal at a high speed, as well as flexibly coping with input and output signals having various frequency ratios, and a storage medium storing a program for carrying out the method.
It is a second object of the invention to provide a frequency control apparatus and method, which requires a simple circuit configuration and is capable of entering an input signal at a high speed, as well as maintaining an output frequency which was obtained in synchronism with a synchronizing signal even when the synchronizing signal is not input, and a storage medium storing a program for carrying out the method.
To attain the first object, according to a first aspect of the present invention, there is provided a frequency control apparatus for controlling a frequency of an output signal thereof in synchronism with an externally input timing signal, comprising a variable frequency oscillator that generates the output signal such that the output signal has a frequency thereof variable in response to a control signal input to the variable frequency oscillator, an input device that receives the timing signal, a checking device that checks a monitor amount variable in response to the frequency of the output signal from the variable frequency oscillator, in timing in which the timing signal is input, a calculating device that calculates a difference between the checked monitor amount and a predetermined desired amount, and a control device that controls the control signal input to the variable frequency oscillator such that the calculated difference becomes zero.
With the above arrangement according to the first aspect, the monitor amount is checked in timing in which the timing signal as a reference signal for synchronization is input, while varying the monitor amount in response to the frequency of the output signal from the variable frequency controller, the difference between the checked monitor amount and the desired amount is determined, and the control signal input to the variable frequency oscillator, i.e. the oscillation frequency thereof is controlled so as to make zero the difference. As a result, checking of the monitor amount, calculation of the difference between the monitor amount and the desired amount, and calculation of the controlled variable of the variable frequency oscillator can all be implemented by software, to thereby enable a large reduction in the number of required component elements of the frequency control apparatus. Further, the amount of deviation of the output frequency of the variable frequency oscillator in both positive and negative directions can be directly determined from the difference between the monitor amount and the desired amount, which enables prompt synchronization of the output frequency with the timing signal to thereby promptly minimize or make zero the deviation amount. Still further, since the frequency ratio between the input signal and the output signal is determined by the desired value of the monitor amount at the time of inputting the timing signal from an external device, the frequency ratio between the input signal and the output signal can be easily changed by varying the desired value.
In the case where predetermined data are input together with the external timing signal, a storage device for temporarily storing the data may be provided, and then a residual amount of data stored in the storage device can be used as the monitor amount.
That is, in a preferred form of the first aspect of the invention, the frequency control apparatus comprises a variable frequency oscillator that generates the output signal such that the output signal has a frequency thereof variable in response to a control signal input to the variable frequency oscillator, a storage device that stores externally input data, an output device that outputs the stored data based on the output signal from the variable frequency oscillator, an input device that receives the timing signal input in synchronism with inputting of the data, a checking device that checks as a monitor amount a residual amount of data stored in the storage device, in timing in which the timing signal is input, a calculating device that calculates a difference between the checked residual amount of data and a predetermined desired amount, and a control device that controls the control signal input to the variable frequency oscillator such that the calculated difference becomes zero.
With the above arrangement, the residual amount of data stored in the storage device is checked as the monitor amount in timing of inputting of the timing signal, and the output frequency of the variable frequency oscillator is controlled based on the difference between the residual data amount and the desired residual amount. As a result, whatever form of data may be input within o
Hiromi Imura
Hitoshi Koseki
Kinya Inoue
Masafumi Toshitani
Sadayuki Narusawa
Pillsbury & Winthrop LLP
Vo Don N.
Yamaha Corporation
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