Frequency changer and digital tuner

Pulse or digital communications – Synchronizers – Phase displacement – slip or jitter correction

Reexamination Certificate

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Details

C455S208000, C455S076000, C331S045000, C331S017000, C329S308000

Reexamination Certificate

active

06895063

ABSTRACT:
A zero or near zero IF frequency changer for use in a digital tuner comprises multipliers which receive the RF input signal from an input. The multipliers receive quadrature local oscillator signals from a first oscillator of an arrangement which comprises first and second phase-locked loops. The first phase-locked loop comprises a programmable divider, a comparator and a control loop so that the first oscillator is phase-locked to a second oscillator. A second phase-locked loop comprises the second oscillator and a synthesizer containing a reference oscillator to which the second oscillator is phase-locked. The output frequency of the second oscillator is in a frequency band which is outside the RF input frequency band of the frequency changer.

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patent: 5896061 (1999-04-01), Behrent
patent: 6188291 (2001-02-01), Gopinathan et al.
patent: 6370360 (2002-04-01), Kunkel
patent: 0253680 (1987-07-01), None
patent: 2319913 (1998-03-01), None
Shahani et al., A 115mW CMOS GPS Receiver, Dec. 1998, ISSCC98 paper Ref. FA 8.1.*
Ulrich L. Rohde, Digital PLL Frequency Synthesizers, 1983, Prentice Hall, ISBN 013 214 293-2.*
Floyd M. Gardner, Phaselock Techniques, Second Edition, 1979, Chapter 10, pp. 208-209.

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