Free-running-frequency adjustment circuit for a clock...

Pulse or digital communications – Synchronizers – Phase displacement – slip or jitter correction

Reexamination Certificate

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Details

C375S373000, C331S025000

Reexamination Certificate

active

06608875

ABSTRACT:

FIELD OF THE INVENTION
The present invention relates to a clock recovery system, and in particular to a high frequency, wide bandwidth, clock recovery system.
BACKGROUND OF THE INVENTION
Clock recovery is the process of synchronizing a local clock signal to a received data signal. That is, clock recovery time-aligns transitions in the received data signal to transitions of the local clock signal. When the local clock signal is synchronized to the received data signal, that clock signal may be used to synchronize the remainder of the signal processing circuitry in the receiver. Local oscillators in receivers are usually set during fabrication to a free-running frequency equal to the nominal frequency of the data signal. However, the frequency of the oscillator signal may not be set exactly to that nominal frequency, and/or the received data signal may not be at the nominal frequency, and/or the oscillator frequency may drift due to component aging in the oscillator or temperature variation during operation. When there are not data edges for a time, the oscillator is essentially free-running, and the phase of the free-running local oscillator will drift away from the phase of the received data signal.
Clock recovery from a data signal is sometimes performed using a second order phase-locked loop. Such a phase-locked loop includes an integrator to eliminate the free running frequency error, described above. However, a phase-locked loop is relatively complex and has a relatively narrow bandwidth. In some cases, such as in test equipment, it is necessary that the clock recovery system have a relatively wide bandwidth. In such cases, injection-locked oscillators have been used. Injection-locked oscillators have a wide bandwidth, and are well suited for clock recovery systems used in such applications. An injection-locked oscillator, by itself, does not, however, correct the free-running frequency error in the local oscillator.
One solution to correcting the free-running frequency error in injection-locked oscillators is to periodically measure the free-running frequency of the oscillator when the circuit is not in service, and trim out the frequency error. This solution cannot be used, however, where the circuit is in use for long periods of time and where e.g. the temperature changes during operation, causing drift in the component characteristics and consequent drift in the free-running frequency of the oscillator.
Another solution to correcting the free-running frequency error in injection-locked oscillators is to measure the average (dc) phase error between the local oscillator clock signal and the received data signal. The dc phase error is proportional to the local oscillator free-running frequency error. The free-running frequency of the local oscillator is corrected to minimize the dc phase error. However, circuitry for measuring the dc phase error and correcting the free-running frequency is usually subject to the same changes (e.g. temperature changes) which cause the mistuning of the free-running frequency of the local oscillator in the first place.
A clock recovery system using an injection-locked local oscillator to achieve wide bandwidth, and including a simple circuit for adjusting the free-running frequency of the local oscillator which may be used during the operation of the clock recovery system, but which is not adversely affected by the same changes which affect the frequency of the local oscillator signal is desirable.
BRIEF SUMMARY OF THE INVENTION
The inventor realized that the phase of the local clock signal is only adjusted (via the injection process) by transitions in the received data signal. In between those transitions, the relative phase between the received data signal and the local oscillator signal drifts due to the difference between the frequency of the received data signal and the free-running frequency of the local clock signal. The inventor also realized that during times where transitions in the received data signal are relatively sparse, the phase error will drift in one direction—as the local oscillator frequency drifts toward the free-running frequency. Similarly, during times where transitions in the received data signal are relatively dense, the phase error will be corrected in the opposite direction—as the local oscillator frequency is drawn back toward the frequency of the input signal. Thus, the inventor realized that by correlating the direction of the phase drift with the density of the transitions of the received data signal during operation of the system, the sign and magnitude of the free-running frequency error may be estimated. From this information, the free-running frequency of the local oscillator may be corrected to minimize the phase drift.
In accordance with principles of the present invention, a clock recovery system includes a source of a data signal having transitions, an injection-locked oscillator having a free-running frequency and generating a clock signal, and a free-running frequency adjustment circuit. The free running frequency adjustment circuit includes a transition density detector for detecting the density of the transitions in the data signal; a phase error detector for detecting the phase error between the clock signal and the data signal; and a correlator for adjusting the free-running frequency of the injection locked oscillator in response to the correlation between the detected transition density in the data signal and the phase error between the data signal and the local oscillator.
A circuit according to principles of the present invention is not, to a first order, sensitive to the changes which affect the frequency of the local oscillator in the first place, and may thus be used to correct the free-running frequency of the local oscillator during the operation of the clock recovery system. In addition, circuitry according to the present invention is relatively simple and inexpensive.


REFERENCES:
patent: 4464771 (1984-08-01), Sorensen
patent: 5276712 (1994-01-01), Pearson
patent: 5307028 (1994-04-01), Chen
patent: 5315270 (1994-05-01), Leonowich
patent: 5987085 (1999-11-01), Anderson
patent: 6072370 (2000-06-01), Nakamura

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