Electrical computers and digital processing systems: memory – Storage accessing and control – Hierarchical memories
Reexamination Certificate
2005-11-01
2005-11-01
Thai, Tuan V. (Department: 2186)
Electrical computers and digital processing systems: memory
Storage accessing and control
Hierarchical memories
C711S003000, C711S100000, C711S118000, C711S154000
Reexamination Certificate
active
06961822
ABSTRACT:
Free memory can be managed by creating a free list having entries with address of free memory location. A portion of this free list can then be cached in a cache that includes an upper threshold and a lower threshold. Additionally, a plurality of free lists are created for a plurality of memory banks in a plurality of memory channels. A free list is created for each memory bank in each memory channel. Entries from these free lists are written to a global cache. The entries written to the global cache are distributed between the memory channels and memory banks.
REFERENCES:
patent: 5276835 (1994-01-01), Mohan et al.
patent: 5875461 (1999-02-01), Lindholm
patent: 5974508 (1999-10-01), Maheshwari
patent: 6026452 (2000-02-01), Pitts
patent: 6026475 (2000-02-01), Woodman
Cherukuri Ravikrishna
Rozario Ranjit J.
Blakely , Sokoloff, Taylor & Zafman LLP
Redback Networks Inc.
Thai Tuan V.
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