FPGA with a plurality of I/O voltage levels

Details FPGA with a plurality of I/O voltage levels FPGA with a plurality of I/O voltage levels

1997-04-11

1999-03-02

Santamauro, Jon

Electronic digital logic circuitry

Multifunctional or programmable

Field-effect transistor

326 83, 326 82, H03K 190948

Patent

active

058776320

ABSTRACT:
The invention comprises an FPGA having a plurality of input reference voltages and/or output voltage supplies. In one embodiment, two or more differential amplifiers in the same configurable input buffer use different input reference voltages. According to a second aspect of the invention, the I/O pad line is configurably connected to the input reference voltage line, so that any configurable Input/Output Block (IOB) can be used to supply the input reference voltage. According to a third aspect of the invention, the reference input of an I/O is configurably connected to any of two or more input reference voltage lines.

REFERENCES:
patent: Re34808 (1994-12-01), Hsieh
patent: 4853560 (1989-08-01), Iwamura et al.
patent: 5300835 (1994-04-01), Assar et al.
patent: 5394034 (1995-02-01), Becker et al.
patent: 5521530 (1996-05-01), Yao et al.
patent: 5606275 (1997-02-01), Farhang et al.
patent: 5777488 (1998-07-01), Dryer et al.
patent: 5793222 (1998-08-01), Nakase
patent: 5801548 (1998-09-01), Lee et al.
Altera Corporation Data Sheet "FLEX 10K Embedded Programmable Logic Family", Jun., 1996, Version 2, pp. 31, 54-59, available from Altera Corporation,2610 Orchard Parkway, San Jose, Ca 95134-2020.
Intel Corporation Data Sheet "Pentium Pro Processor at 150 MHz, 166 MHz, 180 MHz and 200 MHz", Nov. 1995, pp. 46-50, available from Intel Corporation, 2200 Mission College Blvd., Santa Clara CA 95052--8119.
Weste, N. and Eshraghian, K. "Principles of CMOS VLSI Design--A Systems Persspective", Second Edition, Addison-Wesley, 1993, pp. 84-86.
Wilson, Ron, "Xilinx Speeds Submicron-Process Ramp", EE Times, Feb. 3, 1997.
Altera Press Release dated Monday, Apr. 7, 1997 entitled "Altera Supports Mixed-Voltage Systems With New Multivolt Interface".
The Programmable Logic Data Book, available from Xilinx, Inc., 2100 Logic Drive, San Jose, Ca 95124, 1996, pp. 4-292 through 4-293.
Vij, Sandeep, "Stepping down the FPGA voltage staircase," Computer Design Supplement, Feb. 1997, pp. 15-16.
Altera Corporation, "A 3.3-V Programmable Logic Device that Addresses Low Power Supply and Interface Trends" by Rakesh Patel et al., Custom Integrated Circuits Conference (CICC), Santa Clara, California, May 5-8, 1997.

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