FPGA using RAM control signal lines as routing or logic resource

Details FPGA using RAM control signal lines as routing or logic resource FPGA using RAM control signal lines as routing or logic resource

1996-12-24

1999-06-01

Santamauro, Jon

Electronic digital logic circuitry

Multifunctional or programmable

Array

326 41, H03K 19177

Patent

active

059091258

ABSTRACT:
A field programmable gate array configured to use RAM control signals as routing and/or logic resources. By using RAM bit lines as routing, and/or to implement Wire-OR functions, and/or with word lines to implement PAL functions, one may increase the efficiency of lines normally used only for programming the control memory.

REFERENCES:
patent: 4866432 (1989-09-01), Goetting
patent: 5099150 (1992-03-01), Steele
patent: 5162680 (1992-11-01), Norman et al.
patent: 5352940 (1994-10-01), Watson
patent: 5444393 (1995-08-01), Yoshimori
patent: 5465055 (1995-11-01), Ahrens
patent: 5473267 (1995-12-01), Stansfield
patent: 5563527 (1996-10-01), Diba
Xilinx, Inc., "The Programmable Logic Data Book," Sep. 1996, available from Xilinx, Inc., 2100 Logic Drive, San Jose, California 95124.
Betty Prince, "Semiconductor Memories", copyright 1983, 1991, John Wiley & Sons, pp. 149-174.
Anthony Stansfield et al., "The Design of a New FPGA Architecture", 1995, Computer Science 975.

Affiliated with

Also associated with

Rating

FPGA using RAM control signal lines as routing or logic resource does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with FPGA using RAM control signal lines as routing or logic resource, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and FPGA using RAM control signal lines as routing or logic resource will most certainly appreciate the feedback.

Rate now

Comments { 0 }

Profile ID: LFUS-PAI-O-957161