FPGA peripheral routing with symmetric edge termination at...

Details FPGA peripheral routing with symmetric edge termination at... FPGA peripheral routing with symmetric edge termination at...

2005-05-03

2005-05-03

Tokar, Michael (Department: 2819)

Electronic digital logic circuitry

Multifunctional or programmable

Array

C326S041000, C326S039000

Reexamination Certificate

active

06888374

ABSTRACT:
An FPCA includes a scheme for peripheral routing that provides symmetrical routing across its entire area including the periphery by incorporating peripheral routing lines of equal length that are symmetrically deflected orthogonally. The symmetrical peripheral routing lines are connected to switch boxes and connection boxes at the periphery for maintaining constant routing channel width.

REFERENCES:
patent: 6184713 (2001-02-01), Agrawal et al.
patent: 6204689 (2001-03-01), Percey et al.
patent: 6285211 (2001-09-01), Sample et al.
patent: 6320411 (2001-11-01), Mendel
patent: 6577158 (2003-06-01), Gupta
patent: 6624771 (2003-09-01), Bal
patent: 6642743 (2003-11-01), Bal
patent: 6646465 (2003-11-01), Bal

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