FPGA integrated circuit having embedded sram memory blocks...

Electronic digital logic circuitry – Multifunctional or programmable – Array

Reissue Patent

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C326S038000

Reissue Patent

active

10392751

ABSTRACT:
A field-programmable gate array device (FPGA) having plural rows and columns of logic function units (VGB's) further includes a plurality of embedded memory blocks, where each memory block is embedded in a corresponding row of logic function units. Each embedded memory block has a registered address port for capturing received address signals in response to further-received, address-validating clock signals. Interconnect resources are provided for conveying the address-validating clock signals to address-changing circuitry so that a next address can be generated safely in conjunction with the capturing by the registered address port of a previous address signal.

REFERENCES:
patent: 5689195 (1997-11-01), Cliff et al.
patent: 5744980 (1998-04-01), McGowan et al.
patent: 5787007 (1998-07-01), Bauer
patent: 5828229 (1998-10-01), Cliff et al.
patent: 6127843 (2000-10-01), Agrawal et al.
patent: WO 98/10517 (1998-03-01), None

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