FPGA having low power, fast carry chain

Details FPGA having low power, fast carry chain FPGA having low power, fast carry chain

2009-06-01

2011-10-25

Ismail, Shawki (Department: 2819)

Electronic digital logic circuitry

Multifunctional or programmable

Array

C326S038000, C326S047000

Reexamination Certificate

active

08044682

ABSTRACT:
An in-FPGA carry chain is provided that does not exhibit significant leakage current. In particular, parts of the carry chain can be switched on/off when desired. In this manner, carry chain parts can have their leakage currents substantially disabled when they are not in use, thus saving power. Additionally, there is provided a carry chain whose logic is separate from the other parts (e.g., LUTs) of the logic blocks that perform the remaining arithmetic functions, and whose inputs are the input data to be added, rather than data that is output in delayed fashion from the other parts (e.g., LUTs) of the logic blocks. Such a configuration reduces latency by allowing the carry chain to operate directly on the received input data without need to wait on results from the other parts (e.g., LUTs) of the logic blocks.

REFERENCES:
patent: 5359242 (1994-10-01), Veenstra
patent: 5617021 (1997-04-01), Goetting et al.
patent: 6346824 (2002-02-01), New
patent: 7164290 (2007-01-01), Schlacter
patent: 7265576 (2007-09-01), Kondapalli et al.
patent: 7284029 (2007-10-01), Belluomini et al.

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