FPGA having a direct routing structure

Details FPGA having a direct routing structure FPGA having a direct routing structure

2011-06-14

2011-06-14

Barnie, Rexford N (Department: 2819)

Electronic digital logic circuitry

Multifunctional or programmable

Array

C326S047000, C326S101000

Reexamination Certificate

active

07961004

ABSTRACT:
A FPGA comprising, a direct interconnect structure for providing selective data routing without stressing the general-purpose routing resources and enabling high rate of data exchange within the FPGA. At least two IP cores are connected to each other through said direct interconnect structure for enabling simultaneous data interaction among the ports of said IP cores and for providing configurable bus width routing between said IP cores, and a plurality of logic blocks connected to said IP cores through said direct interconnect structure for enabling simultaneous data routing among said IP cores and said plurality of logic blocks.

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“Notice of Allowance”, U.S. Appl. No. 11/264,674, (Sep. 18, 2009), 10 pages.

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