FPGA configuration memory with built-in error correction...

Details FPGA configuration memory with built-in error correction... FPGA configuration memory with built-in error correction...

2006-09-19

2006-09-19

Lamarre, Guy J. (Department: 2133)

Error detection/correction and fault detection/recovery

Pulse or data error handling

Digital data error correction

C714S725000, C326S038000, C326S039000, C716S030000, C716S030000, C716S030000, C716S030000

Reexamination Certificate

active

07111224

ABSTRACT:
An on-chip error correction circuit can be used to correct errors in memory cells of a FPGA. In one embodiment of the invention, the circuit can compute, during configuration, a plurality of error correction bits. These error correction bits are stored in a designated location on the FPGA. After all the memory cells are configured, the error correction circuit continuously computes the error correction bits of the memory cells and compares the result to the corresponding values stored in the designated location. If there is discrepancy, the stored error correction bits are used to correct the errors. In another embodiment of the invention, a plurality of parity bits of the original configuration bits is calculated. These parity bits are stored in registers. The FPGA contains on-chip parity bit generators that generate the corresponding parity bits. A discrepancy between the generated and stored parity triggers error correction action.

REFERENCES:
patent: 5426379 (1995-06-01), Trimberger
patent: 5430687 (1995-07-01), Hung et al.
patent: 5764564 (1998-06-01), Frake et al.
patent: 6101624 (2000-08-01), Cheng et al.
patent: 6102963 (2000-08-01), Agrawal
patent: 6175940 (2001-01-01), Saunders
patent: 6550030 (2003-04-01), Abramovici et al.
Felton et al. ‘Configuration Data Verification and the Integrity Checking of SRAM-based FPGAs:’ 1991.
Huang et al. “A Memory Coherence Technique for Online Transient Error Recovery of FPGA Configurations;” Feb. 13, 2001.

Affiliated with

Also associated with

Rating

FPGA configuration memory with built-in error correction... does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with FPGA configuration memory with built-in error correction..., we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and FPGA configuration memory with built-in error correction... will most certainly appreciate the feedback.

Rate now

Comments { 0 }

Profile ID: LFUS-PAI-O-3547057