FPGA architecture with repeatable titles including routing matri

Details FPGA architecture with repeatable titles including routing matri FPGA architecture with repeatable titles including routing matri

1997-10-03

1999-03-16

Tokar, Michael

Electronic digital logic circuitry

Multifunctional or programmable

Array

326 40, 326 41, H03K 738, H03K 19177

Patent

active

058835253

ABSTRACT:
An FPGA architecture offers logic elements with direct connection to neighboring logic elements and indirect connection through a routing matrix. A logic element and a portion of the routing matrix are formed as part of a tile, and tiles are joined to form arrays of selectable size. The routing matrix includes routing lines which connect just from one tile to the next and routing lines which extend longer distances through several tiles or through the entire chip. This combination is achieved by the formation of individual tiles, all of which are identical.

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