Static information storage and retrieval – Floating gate – Particular biasing
Patent
1997-11-12
1999-10-05
Dinh, Son T.
Static information storage and retrieval
Floating gate
Particular biasing
36518518, 36518529, 365218, G11C 1606
Patent
active
059634766
ABSTRACT:
A new flash memory cell structure and operational bias is based on the use of a triple well flash memory cell which allows pre-programming by Fowler Nordheim (F-N) tunneling over blocks of cells at a time. The floating gate memory cell is made in a semiconductor substrate having a first conductivity type, such as p-type. A first well within the substrate by having a second conductivity type different than the first conductivity type is included. A second well within the first well is also included having the first conductivity type. A drain and a source are formed in the second well having the second conductivity type, and spaced away from one another to define a channel area between the drain and the source. A floating gate and control gate structure is included over the channel area. The floating gate memory cell is coupled with circuits that induce F-N tunneling of electrons out of the floating gate into the channel area of the substrate for erasing by applying a positive voltage to the second well, such as a voltage higher than the supply voltage, applying a positive voltage to the first well, which is substantially equal to the positive voltage of the second well, applying a negative voltage to the control gate of the cell, while the substrate is grounded. A block wide pre-program operation involves F-N tunneling of electrons into the floating gate from the channel area, using a negative voltage in the second well.
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Cheng Yao-Wu
Hung Chun Hsiung
Lee I-Long
Shiau Tzeng-Huei
Shone Fuchia
Dinh Son T.
Macronix International Co. Ltd.
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