Four transistor static bipolar memory cell using merged transist

Details Four transistor static bipolar memory cell using merged transist Four transistor static bipolar memory cell using merged transist

1977-09-13

1978-09-05

Fears, Terrell W.

Static information storage and retrieval

Systems using particular element

Semiconductive

365174, 307238, G11C 1140, G11C 1300

Patent

active

041125118

ABSTRACT:
A bipolar memory cell of reduced size requires only four I.sup.2 L operated transistors and three access lines. Two current injection transistors supply operating current to two inversely operated flip-flop transistors and also function as load devices as well as coupling devices. The three access lines conduct power to the cells as well as the signals for the write and read operations. A write operation is performed by ratioing the currents supplied to a memory cell array such that only a selected cell is written.

REFERENCES:
patent: 3815106 (1974-06-01), Weidmann

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