Forming ultra dense 3-D interconnect structures

Details Forming ultra dense 3-D interconnect structures Forming ultra dense 3-D interconnect structures

2007-02-09

2010-06-29

Maldonado, Julio J. (Department: 2823)

Active solid-state devices (e.g., transistors, solid-state diode

Combined with electrical contact or lead

Of specified configuration

C257S700000, C257S698000, C257S777000, C257S778000

Reexamination Certificate

active

07745940

ABSTRACT:
Methods of forming a microelectronic structure are described. Embodiments of those methods include bonding at least one bond pad of a device side of a first substrate to at least one bond pad of a device side of a second substrate, forming at least one via to connect to at least one of an active feature and an interconnect structure disposed within the first substrate, and forming a reactive material on a surface of at least one of the active features.

REFERENCES:
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patent: 6124179 (2000-09-01), Adamic, Jr.
patent: 6429509 (2002-08-01), Hsuan
patent: 6957413 (2005-10-01), McKeone et al.
patent: 7312487 (2007-12-01), Alam et al.

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