Forming a conductive structure in a semiconductor device

Details Forming a conductive structure in a semiconductor device Forming a conductive structure in a semiconductor device

1998-02-26

2001-09-18

Prenty, Mark V. (Department: 2822)

Active solid-state devices (e.g., transistors, solid-state diode

Field effect device

Having insulated electrode

C257S751000

Reexamination Certificate

active

06291868

ABSTRACT:

BACKGROUND
The invention relates to forming a conductive structure in a semiconductor device.
Advanced integrated circuits in a semiconductor device require high speed interconnecting lines between circuits for improved device speed. Interconnecting lines are typically made of metal, e.g., aluminum, titanium. However, in some parts of a semiconductor device, particularly in regions where components are densely packed (such as the array of a memory device), or in regions where further heat steps are needed after formation of the interconnecting line during the manufacturing process, other materials are also widely used to form interconnecting lines, e.g., doped polysilicon or N+ or P+ diffused regions
The different types of interconnecting lines exhibit different resistivities, with metal generally having the lowest resistivity. Polysilicon, which is also typically used as the conductive electrode at the gate of an N-channel or P-channel metal-oxide-silicon field effect transistor (MOSFET), exhibits a higher resistivity than metal.
As the speed requirements of semiconductors increase, the resistance of interconnecting lines, especially those formed of a higher resistivity material (such as polysilicon) reduces switching speeds of circuits in the device. The resistance of a line increases proportionately with its length. Thus, a polysilicon line running over a long length and connected to a large capacitive load, such as a wordline in a memory array connected to multiple transistors in the array, would cause a high RC delay during circuit switching.
One approach to reduce the resistivity of a polysilicon interconnect line is to use a polycide structure, in which a low resistance silicide (e.g., WSix) is formed on top of a doped polysilicon layer. This effectively forms a two-layer interconnect line in which the silicide layer provides a low resistivity conductive path.
Three-layer interconnecting lines have also been proposed, including a polymetal composite structure having tungsten (W) as the top layer, tungsten silicide nitride (WSiN) as the intermediate layer, and polysilicon as the bottom layer. The polymetal structure has a resistivity lower than the polycide structure that includes tungsten silicide on polysilicon.
SUMMARY
The invention in one aspect is directed to multilayer conductive structures formed of preselected low resistivity materials in a semiconductor device.
This aspect of the invention has one or more of the following advantages. By using certain preselected materials to form the conductive structures, oxidation, agglomeration, and silicidation of layers in the conductive structure can be reduced. By reducing the resistance of conductive structures, the switching speed of circuits in an integrated circuit device can be improved.
In another aspect, the invention is directed to an improved oxidation process that selectively oxidizes certain surfaces while the oxidation of other surfaces is reduced.
This aspect of the invention has one or more of the following advantages. By performing selective oxidation, the oxidation of preselected materials can be reduced to reduce the likelihood of defects in these materials as well as reduce the total number and complexity of subsequent process steps. By using a single-wafer system to perform the selective oxidation, better temperature control, ambient control, and uniformity of oxidation over the entire processed surface of a wafer can be achieved. This is particularly advantageous when large wafers are used.
In general, in one aspect, the invention features a multilayer conductive structure for use in a semiconductor device that includes a first electrically conductive layer formed on a support surface and an electrically conductive barrier layer formed over the first layer. Additionally, the second electrically conductive layer is formed over the barrier layer, the second electrically conductive layer including metal silicide.
In general, in another aspect, the invention features an oxidation system for oxidizing layers formed on a base of a semiconductor device, a first layer containing silicon. The oxidation system includes a source of H
2
vapor, a source of H
2
O vapor, a flow controller connected to deliver a mixture of H
2
O and H
2
, and a process chamber in which the semiconductor device is placed. The process chamber is connected to receive the mixture of H
2
O and H
2
to perform selective oxidation of the first layer over the other layers.
Other features and advantages will become apparent from the following description and from the claims.


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