Adhesive bonding and miscellaneous chemical manufacture – Delaminating processes adapted for specified product – Delaminating in preparation for post processing recycling step
Patent
1980-08-05
1982-10-19
Smith, John D.
Adhesive bonding and miscellaneous chemical manufacture
Delaminating processes adapted for specified product
Delaminating in preparation for post processing recycling step
156655, 156646, 156647, 156652, 156653, 156657, 1566591, 427 86, 427 93, 427 94, 427 95, 430314, H01L 21302
Patent
active
043548962
ABSTRACT:
A method for patterning a submicrometer substrate element which is smaller than the reproducible resolution accuracy of optical lithography. A series of layers is deposited upon a top layer pattern using standard methods. An edge of the top layer is positioned at or near where the required submicrometer element is to be patterned. A cavity is formed in one of the intermediate layers by removing that intermediate layer in such a fashion that the layer underneath the edge of the top layer is removed. Next, a conformal layer is deposited upon the structure so that the conformal layer fills the cavity. Then the conformal layer is removed and each of the other layers is sequentially removed in such a fashion that only that portion of the conformal layer that occupied the cavity remains, together with any layers that occupy the space underneath the cavity. The remaining layers are the mask for further patterning.
REFERENCES:
patent: 3977925 (1976-08-01), Schwabe
patent: 4256514 (1981-03-01), Pogge
Deines et al., "Process for Realization of Submicron Geometrics", IBM TDB, vol. 21, No. 9, Feb. 1979, pp. 3628-3629.
Jackson et al., "A Novel Submicron Fabrication Technique", International Electronic Device Meeting Technical Abstracts, Dec. 1-3, 1979, Washington, DC.
Jelks et al., "A Simple Method for Fabricating Lines of 0.15-.mu. Width Using Optical Lithography", Appl. Phys. Lett. 34 (1), Jan. 1979, pp. 28-30.
Hosack, "Minimum Geometry Etch Windows to a Polysilicon Surface", IEEE Transactions on Electron Devices, vol. EO-25, No. 1, Jan. 1978, pp. 67-69.
Ipri, "Sub-Micron Polysilicon Gate CMOS/SOS Technology", International Electronic Device Meeting Technical Abstracts, Dec. 4-6, 1978, Washington, DC, pp. 46-49.
Coe, "The Lateral Diffusion of Boron in Polycrystalline Silicon and Its Influence on the Fabrication of Sub-Micron MOSTS", Solid State Electronics, vol. 20, pp. 985-992, 1977.
Kim, "A Very Small Schottky Barrier Diode (SBD) with Self-Aligned Guard Ring for VLSI Applications", Technical Digest of 1979 International Electronic Device Meeting, pp. 49-53.
Holloway Thomas C.
Hunter William R.
Tasch, Jr. Al F.
Donaldson Richard
Sharp Melvin
Smith John D.
Texas Instruments Incorporated
Tyson Thomas E.
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