Formation of lattice-tuning semiconductor substrates

Details Formation of lattice-tuning semiconductor substrates Formation of lattice-tuning semiconductor substrates

2007-05-08

2007-05-08

Lebentritt, Michael (Department: 2812)

Semiconductor device manufacturing: process

Formation of semiconductive active region on any substrate

C438S037000, C438S479000, C438S483000, C257S190000, C257S191000, C257SE21127

Reexamination Certificate

active

10514941

ABSTRACT:
In order to reduce dislocation pile-ups in a virtual substrate, a buffer layer32is provided, between an underlying Si substrate34and an uppermost constant composition SiGe layer36, which comprises alternating graded SiGe layers38and uniform SiGe layers40. During the deposition of each of the graded SiGe layers38the Ge fraction x is linearly increased from a value corresponding to the Ge composition ratio of the preceding layer to a value corresponding to the Ge composition ratio of the following layer. Furthermore the Ge fraction x is maintained constant during deposition of each uniform SiGe layer40, so that the Ge fraction x varies in step-wise fashion through the depth of the buffer layer. After the deposition of each pair of graded and uniform SiGe layers38and40, the wafer is annealed at an elevated temperature greater than the temperature at which the layers have been deposited. Each graded SiGe layer is permitted to relax by pile-ups of dislocations, but the uniform SiGe layers40prevent the pile-ups of dislocations from extending out of the graded SiGe layers38. Furthermore each of the subsequent annealing steps ensures that the previously applied graded and uniform SiGe layers38and40are fully relaxed in spite of the relative thinness of these layers. As a result the dislocations are produced substantially independently within successive pairs of layers38and40, and are relatively evenly distributed with only small surface undulations40being produced. Furthermore the density of threading dislocations is greatly reduced, thus enhancing the performance of the virtual substrate by decreasing the disruption of the atomic lattice which can lead to scattering of electrons in the active devices and degradation of the speed of movement of the electrons.

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