Formation of interconnect structures by removing sacrificial...

Semiconductor device manufacturing: process – Coating with electrically or thermally conductive material – To form ohmic contact to semiconductive material

Reexamination Certificate

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C438S421000, C438S422000, C438S619000, C438S623000

Reexamination Certificate

active

06924222

ABSTRACT:
An inter-layer dielectric structure and method of making such structure are disclosed. A composite dielectric layer comprising a porous matrix, as well as a porogen in certain variations, is formed adjacent a sacrificial dielectric layer. Subsequent to other processing treatments, a portion of the sacrificial dielectric layer is decomposed and removed through a portion of the porous matrix using supercritical carbon dioxide leaving voids in positions previously occupied by portions of the sacrificial dielectric layer. The resultant structure has a desirably low k value as a result of the voids and materials comprising the porous matrix and other structures. The composite dielectric layer may be used in concert with other dielectric layers of varying porosity, dimensions, and material properties to provide varied mechanical and electrical performance profiles.

REFERENCES:
patent: 6077792 (2000-06-01), Farrar
patent: 6165890 (2000-12-01), Kohl et al.
patent: 6306754 (2001-10-01), Agarwal
patent: 6319858 (2001-11-01), Lee et al.
patent: 6448177 (2002-09-01), Morrow et al.
patent: 2002/0127844 (2002-09-01), Grill et al.
Tetsuya Ueda et al., “A novel air gap integration scheme for multi-level interconnects using self-aligned via plugs”, 1998 Symposium on VLSI Technology—Digest of Technical Papers, Jun. 9-11, 1998, IEEE, pp. 46-47.
Paul A. Kohl et al, “Air-gaps in 0.3/ spl mu / m electrical interconnections”, IEEE Electron Device Letters, vol. 21, Issue 12, Dec. 2000, pp. 557-559.

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