Semiconductor device manufacturing: process – Coating with electrically or thermally conductive material – To form ohmic contact to semiconductive material
Reexamination Certificate
2011-08-02
2011-08-02
Picardat, Kevin M (Department: 2822)
Semiconductor device manufacturing: process
Coating with electrically or thermally conductive material
To form ohmic contact to semiconductive material
C438S618000, C438S622000, C438S635000, C438S641000, C438S644000, C438S653000, C438S654000, C438S655000, C438S687000
Reexamination Certificate
active
07989342
ABSTRACT:
The present invention relates to a method for fabricating a diffusion-barrier cap on a Cu-containing interconnect element that has crystallites of at least two different crystal orientations, comprises selectively incorporating Si into only a first set of crystallites with at least one first crystal orientation, employing first process conditions, and subsequently selectively forming a first adhesion-layer portion comprising CuSi and a first diffusion-barrier-layer portion only on the first set of crystallites, thus forming a first barrier-cap portion, and subsequently selectively incorporating Si into only the second set of crystallites, employing second process conditions that differ from the first process conditions, and forming a second barrier-cap portion comprising a Si-containing second diffusion-barrier layer portion on the second set of crystallites of the interconnect element. The processing improves the properties of the diffusion-barrier cap and secures a continuous formation of a diffusion-barrier layer on the interconnect element.
REFERENCES:
patent: 5447887 (1995-09-01), Filipiak et al.
patent: 6339025 (2002-01-01), Liu et al.
patent: 6599827 (2003-07-01), Ngo et al.
patent: 6660634 (2003-12-01), Ngo et al.
patent: 7309651 (2007-12-01), West et al.
patent: 2002/0155702 (2002-10-01), Aoki et al.
patent: 2005/0161817 (2005-07-01), Meyer et al.
patent: 2006/0281299 (2006-12-01), Chen et al.
patent: 2007/0018332 (2007-01-01), Ueno
patent: 2007/0035029 (2007-02-01), Caubet et al.
patent: 2008/0311739 (2008-12-01), Besling et al.
S. Chhun, L.G. Gosset, J. Michelon, V. Girault, J. Vitiello, M. Hopstaken, S. Courtas, C. Debauche, P.H.L. Bancken, N. Gaillard, G. Bryce, M. Juhel, L Pinzelli, J. Guillan, R. Gras, B. Van Schravendijk, J.-C. Dupuy, J. Torres; Cu surface treatment influence on Si adsorption properties of CuSiN self-aligned barriers for sub-65 nm technology node; ScienceDirect; Microelectronic Engineering 83; 2006; 2094-2100.
International Search Report; PCT/EP2008/052565; Jun. 26, 2008.
Written Opinion of the International Searching Authority; PCT/EP2008/052565; Jun. 26, 2008.
Arnal Vincent
Chhun Sonarith
Gosset Laurent
Torres Joaquin
Au Bac H
Picardat Kevin M
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