Formation method for semiconductor layer

Single-crystal – oriented-crystal – and epitaxy growth processes; – Forming from vapor or gaseous state – Including change in a growth-influencing parameter

Reexamination Certificate

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C117S088000, C117S106000, C117S952000

Reexamination Certificate

active

06562129

ABSTRACT:

BACKGROUND OF THE INVENTION
The present invention relates to a method for forming a Group III-V compound semiconductor layer, which is used for a light-emitting element that emits light in a short wavelength range covering violet to ultraviolet wavelengths.
Recently, a light-emitting element for emitting light in the short wavelength range covering the violet to ultraviolet wavelengths is in higher and higher demand as a light source for a next-generation high-density optical disk. Particularly, a Group III-V compound semiconductor layer that contains gallium nitride (GaN) as a main component has been vigorous researched and developed.
A Group III-V compound semiconductor layer, deposited by a metalorganic vapor phase epitaxy (MOVPE) process and containing gallium nitride as a main component, is supposed to have its resistance reduced by introducing a p-type dopant thereto. However, hydrogen atoms bond to the p-type dopant when the layer is passivated with hydrogen, thereby unintentionally deactivating the p-type dopant. For this reason, it is difficult to reduce the resistance of the p-type Group III-V compound semiconductor layer.
In view of this, a countermeasure process was proposed in Japanese Laid-Open Publication No. 5-183189. Specifically, in this process a p-type gallium nitride semiconductor layer is deposited on a substrate and then annealed at a temperature of 500° C. or more in an ambient containing substantially no hydrogen, thereby ejecting hydrogen from the p-type gallium nitride semiconductor layer and activating the p-type dopant. In this manner, the p-type gallium nitride semiconductor layer should have its resistance reduced.
Further, as described in Japanese Laid-Open Publication No. 5-183189, if the p-type gallium nitride semiconductor layer is annealed in this manner, the resistivity of the p-type gallium nitride semiconductor layer can be reduced to somewhere between 1×10
6
∩·cm and several &OHgr;·cm.
However, the present inventors were confronted with a fact that it was impossible to reduce the resistivity of the p-type gallium nitride semiconductor layer to about 1×10
6
&OHgr;·cm to several &OHgr;·cm as intended even if the p-type gallium nitride semiconductor layer was annealed at a temperature of 500° C. or more in an ambient containing substantially no hydrogen.
SUMMARY OF THE INVENTION
It is therefore an object of the present invention to reduce the resistance value of a p-type Group III-V compound semiconductor layer as intended.
The present inventors tried hard to find measures for achieving this object through various types of experiments. As a result, we found that if a temperature gradient is created in the compound semiconductor layer or the stress of the compound semiconductor layer is relaxed in a heating stage included in an annealing process, atoms deactivating a p-type dopant can be eliminated from the compound semiconductor layer. We also found that if the compound semiconductor layer is cooled rapidly, it is possible to prevent the atoms deactivating the p-type dopant from entering the compound semiconductor layer in a cooling stage succeeding the heating stage. The present invention was made based on these findings. More specifically, this invention is realized by the following first through third methods for forming a semiconductor layer.
A first inventive method for forming a semiconductor layer includes the steps of: forming a Group III-V compound semiconductor layer, to which a p-type dopant has been introduced, over a substrate; and annealing the compound semiconductor layer. The annealing step includes the step of eliminating atoms, deactivating the p-type dopant, from the compound semiconductor layer by creating a temperature gradient in the compound semiconductor layer in the stage of heating the compound semiconductor layer.
According to the first method, atoms, deactivating a p-type dopant, can be eliminated from a compound semiconductor layer by creating a temperature gradient in the compound semiconductor layer being heated. As a result, the resistivity of the compound semiconductor layer can be reduced as intended.
In the first method, the temperature gradient is preferably created vertically to the substrate.
Then, the atoms, deactivating the p-type dopant, can be ejected out of the compound semiconductor layer through the entire surface thereof. As a result, the resistivity of the compound semiconductor layer can be reduced as intended.
In the first method, the stage of heating the compound semiconductor layer preferably includes the step of creating the temperature gradient in the compound semiconductor layer vertically to the substrate by heating the compound semiconductor layer at an up rate greater than 0.3° C./s.
Then, an intended temperature gradient can be created in the compound semiconductor layer so that the temperature is high in a part of the compound semiconductor layer closer to the substrate and low in another part thereof closer to the surface. As a result, the atoms, deactivating the p-type dopant, can be ejected out of the compound semiconductor layer through the surface thereof as intended.
In the first method, the stage of heating the compound semiconductor layer preferably includes the step of creating the temperature gradient in the compound semiconductor layer vertically to the substrate by heating the compound semiconductor layer at an up rate greater than 10° C./s.
Then, a steep temperature gradient can be created in the compound semiconductor layer as intended so that the temperature is high in a part of the compound semiconductor layer closer to the substrate and low in another part thereof closer to the surface. As a result, the atoms, deactivating the p-type dopant, can be ejected out of the compound semiconductor layer through the surface thereof with more certainty.
In the first method, the stage of heating the compound semiconductor layer preferably includes the step of creating the temperature gradient in the compound semiconductor layer vertically to the substrate by supplying a pulsed cooling gas to the surface of the compound semiconductor layer.
Then, the temperature gradient can be created in the compound semiconductor layer so that the temperature is high in a part of the compound semiconductor layer closer to the substrate and low in another part thereof closer to the surface. As a result, the atoms, deactivating the p-type dopant, can be ejected out of the compound semiconductor layer through the surface thereof as intended.
In this case, the stage of heating the compound semiconductor layer is preferably performed in a nitrogen gas ambient and the cooling gas is preferably a hydrogen gas.
Then, by using a hydrogen gas having a thermal conductivity higher than that of a nitrogen gas in an annealing process performed normally, a temperature gradient, where the temperature is high in a part of the compound semiconductor layer closer to the substrate and low in another part thereof closer to the surface, can be created in the compound semiconductor layer as intended.
In the first method, the temperature gradient is preferably created horizontally to the substrate.
Then, the atoms, deactivating the p-type dopant, can be ejected out of the compound semiconductor layer through the surface the low-temperature part thereof. As a result, the resistivity of the compound semiconductor layer can be reduced as intended.
In the first method, the stage of heating the compound semiconductor layer preferably includes the step of creating the temperature gradient in the compound semiconductor layer horizontally to the substrate by heating the substrate on a first tray kept at a first temperature, and then placing the substrate at such a position as covering the first tray and a second tray kept at a second temperature lower than the first temperature.
Then, the temperature gradient can be created in the compound semiconductor layer horizontally to the substrate as intended.
In the first method, the stage of heating the compound semiconductor layer preferably includes the step o

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