Flushing cached data upon power interruption

Details Flushing cached data upon power interruption Flushing cached data upon power interruption

2011-01-11

2011-01-11

Nguyen, Than (Department: 2187)

Electrical computers and digital processing systems: memory

Storage accessing and control

Hierarchical memories

C711S126000, C711S162000, C714S014000, C714S005110

Reexamination Certificate

active

07870338

ABSTRACT:
An I/O processor determines whether or not the amount of dirty data on a cache memory exceeds a threshold value and, if the determination is that this threshold value has been exceeded, writes a portion of the dirty data of the cache memory to a storage device. If a power source monitoring and control unit detects a voltage abnormality of the supplied power, the power monitoring and control unit maintains supply of power using power from a battery, so that a processor receives supply of power from the battery and saves the dirty data stored on the cache memory to a non-volatile memory.

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patent: 2005/0081048 (2005-04-01), Komarla et al.
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patent: 1650646 (2006-04-01), None
patent: 1705574 (2006-06-01), None
patent: 2004-021811 (2004-01-01), None

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