Electrical computers and digital data processing systems: input/ – Intrasystem connection – Bus interface architecture
Reexamination Certificate
2000-06-27
2004-01-13
Auve, Glenn A. (Department: 2189)
Electrical computers and digital data processing systems: input/
Intrasystem connection
Bus interface architecture
C710S029000, C370S360000
Reexamination Certificate
active
06678782
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Technical Field
The present invention relates in general to an improved method and system for managing communications networks. In particular, the present invention relates to a switching flow control mechanism within a telecommunications network. More particularly, the present invention relates to a method and system for replacing conventional prioritized output queuing with a logical flow control mechanism implemented within a switch fabric that can be utilized as a remote bus interconnect, such that data ordering as well as flow control concerns can be simultaneously addressed.
2. Description of the Related Art
Previously, slow network speeds and flow control provided by higher layer protocols such as Transmission Control Protocol/Internet Protocol (TCP/IP) have prevented flow control at switches from being a problem. With the recent improvement in node-to-node flow control and data transmission media within telecommunications networks, congestion at bridges or switches has become more problematic. The recent increase in network speeds up to gigabits per second, coupled with full-duplex transmission capabilities, has mandated the need for a flow control mechanism. The goals of such flow control include efficiency and fairness.
Server input/output (I/O) is evolving in directions defined by new initiatives such as Next Generation I/O (NGIO), Future I/O (FIO), and System I/O (SIO). NGIO, FIO, and SIO have been combined into the InfiniBand architecture by the InfiniBand consortium. These I/O adapters require a switch fabric to interconnect host channel adapters (HCAs) to target channel adapters (TCAs).
Many conventional switching fabrics, such as PRIZMA switching fabric produced by International Business Machines (IBM), utilizes a programmable packet flow priority scheme. At initialization, the number of priorities available can be set to a value between one and n. Hence, such a switch can support up to n priority levels implemented by an n-queues prioritization scheme. Flow control mechanisms are available to control the flow of packets having differing priorities at the input and output of the switching fabric. Input flow control in such a switching fabric may be achieved utilizing on-chip pins or by receive-grant information in the header of each packet. Flow control at the output of the switching fabric may be provided by send-grant pins.
In such a priority flow control scheme, the disablement of a priority will lead to all lower priority flows also being disabled. The n queues corresponding to the n priority levels are thus serviced with a priority rule whereby a packet waiting in a high priority queue is transmitted before any lower priority queues are serviced.
Flow control thresholds and backpressure triggers within conventional switching fabrics are based on priority based queuing that utilized cumulative output queue size for different queue sizes. Therefore, whenever a high priority is disabled, all lower priority traffic is guaranteed to be disabled. Serial queues, such as peripheral component interconnect (PCI) bus interfaces, may become bottlenecks that may potentially reduce the performance advantage of utilizing a high-speed network switching interface. PCI is a well-known standard for 32/64-bit local buses designed for fast access to peripheral devices such as user displays, disk drives, modems, etc., within personal computers.
Due to the physical interruption of the bus interfaces at switch I/O's, adequate buffer management must be provided to prevent intra-switch buffer overflow or underflow. Serial queues, such as remote PCI bus interfaces, become potential bottlenecks of flow control is maintained serially within the switching fabric.
It can therefore be appreciated that a need exists for an improved system and method to utilize queuing capabilities of a switch to maintain a parallel flow control and data ordering mechanism by which remote bus interfaces can be remotely switched.
SUMMARY OF THE INVENTION
A system having a high speed switching interface between remote buses is disclosed herein. The system includes a switch fabric to which multiple remote bus interfaces are connected. A programmable flow queue that includes multiple parallel logic flow queues is utilized for scheduling packets in accordance with protocol requirements of the remote bus interface.
All objects, features, and advantages of the present invention will become apparent in the following detailed written description.
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1000/Research Disclosure Jul. 1999, 42399 “Creating Configurable Network Interface”, Disclosed by International Business Machines Corporation.
Aydemir Metin
Rindos, III Andrew John
Rodriguez Jorge Rolando
Auve Glenn A.
International Business Machines - Corporation
Reid Scott W.
Vu Trisha
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