Flop repeater circuit

Details Flop repeater circuit Flop repeater circuit

2008-05-27

2008-05-27

Payne, David C. (Department: 2611)

Pulse or digital communications

Repeaters

C327S203000

Reexamination Certificate

active

07379491

ABSTRACT:
A system is provided that includes a clocking circuit to provide two repeater clock signals and a flop repeater circuit to receive the two repeater clock signals and an input data signal. The flop repeater circuit to provide an output data signal based on the two repeater clock signals. The flop repeater circuit including a plurality of transistors and inverters coupled together to function as a flip-flop circuit that passes data without any full transmission gates.

REFERENCES:
patent: 4032911 (1977-06-01), Melvin, Jr.
patent: 4602210 (1986-07-01), Fasang et al.
patent: 5155382 (1992-10-01), Madden et al.
patent: 5612632 (1997-03-01), Mahant-Shetti et al.
patent: 5680415 (1997-10-01), Hickman
patent: 6240139 (2001-05-01), Cao et al.
patent: 6564335 (2003-05-01), Freker
patent: 6588001 (2003-07-01), Porterfield
patent: 6693459 (2004-02-01), Nedovic et al.
patent: 6788122 (2004-09-01), Jones, Jr.
patent: 6944784 (2005-09-01), Clark et al.
patent: 2002/0057602 (2002-05-01), Huber
patent: 2003/0133621 (2003-07-01), Fujii et al.
patent: 2004/0047404 (2004-03-01), Kim
patent: 2004/0140835 (2004-07-01), Lehmann et al.
patent: 2006/0013208 (2006-01-01), Rietschel et al.
Ruibing Lu et al. “Flip Flop and Repeater Insertion for Early Interconnect Planning” Date no earlier than 2001.

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