Active solid-state devices (e.g. – transistors – solid-state diode – Field effect device – Having insulated electrode
Reexamination Certificate
2005-03-01
2005-03-01
Nhu, David (Department: 2818)
Active solid-state devices (e.g., transistors, solid-state diode
Field effect device
Having insulated electrode
C257S296000
Reexamination Certificate
active
06861685
ABSTRACT:
A nonvolatile memory device includes a semiconductor wall having an inclination angle and a gate electrode covered with the semiconductor wall. A pair of buried diffusion layers may be formed at a lower surface and upper surface formed by the semiconductor wall. A charge trap insulating layer may be sandwiched between the gate electrode and the semiconductor wall. The semiconductor wall between the buried diffusion layers may correspond to a channel of the memory device. In a method of fabricating the memory device, a pattern having a sidewall may be formed on a semiconductor substrate. A buried oxide layer may be formed at the upper surface and another buried oxide layer may be formed at the lower surface. A charge trap insulating layer may be formed at the sidewall where the buried oxide layers are formed. A gate electrode may be formed on the charge trap insulating layer. A semiconductor substrate may be formed to form a trench, so that the sidewall may be obtained.
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Boaz Eitan et al., “NROM: A Novel Localized Trapping, 2-Bit Nonvolatile Memory Cell”, IEEE Electron Device Letters, vol. 21, No. 11, Nov. 2000, pp 543-545.
Harness & Dickey & Pierce P.L.C.
Nhu David
Samsung Electronics Co,. Ltd
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