Static information storage and retrieval – Read/write circuit – Erase
Patent
1993-04-01
1995-06-13
Popek, Joseph A.
Static information storage and retrieval
Read/write circuit
Erase
365185, 365900, G11C 700, G11C 1602
Patent
active
054249910
ABSTRACT:
A method is described for eliminating overerasure in a nonvolatile memory that includes a plurality of memory cells, each having a control gate, a floating gate, a drain, and a source. The nonvolatile memory is electrically erased until each of the plurality of memory cells has a threshold voltage below a predetermined erased voltage state. The nonvolatile memory then undergoes an equalization programming operation by applying an equalization programming voltage to the control gate of each of the plurality of memory cells such that the threshold voltage of each of the plurality of memory cells is saturated to the predetermined erased voltage state. The equalization programming voltage determines the predetermined erased voltage state. An apparatus for eliminating overerasure in the nonvolatile memory during erasing is also described.
REFERENCES:
patent: 4460982 (1984-07-01), Gee et al.
patent: 4636983 (1993-01-01), Young et al.
patent: 4875188 (1989-10-01), Jungroth
patent: 4954990 (1990-09-01), Vider
patent: 5122985 (1992-06-01), Santin
patent: 5132935 (1992-07-01), Ashmore, Jr.
patent: 5142495 (1992-08-01), Canepa
patent: 5182338 (1992-12-01), Mehrotra et al.
patent: 5233562 (1993-08-01), Ong et al.
patent: 5272669 (1993-12-01), Samachisa et al.
patent: 5295107 (1994-03-01), Okazawa et al.
T. Nakayama, S. Kobayashi, Y. Miyawaki, Y. Terada, N. Ajika, M. Ohi, H. Arima, T. Matsukawa, T. Yoshihara, "A 60 ns 16 Mb Flash EEPROM with Program and Erase Sequence Controller," Digest of Technical Papers, IEEE International Solid State Circuits Conference, pp. 260-261 (1990).
Cypress Semiconductor Corporation
Nguyen Tan
Popek Joseph A.
LandOfFree
Floating gate nonvolatile memory with uniformly erased threshold does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with Floating gate nonvolatile memory with uniformly erased threshold, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Floating gate nonvolatile memory with uniformly erased threshold will most certainly appreciate the feedback.
Profile ID: LFUS-PAI-O-1315900