Floating gate memory cells with increased coupling radio

Active solid-state devices (e.g. – transistors – solid-state diode – Field effect device – Having insulated electrode

Reexamination Certificate

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C257SE29152

Reexamination Certificate

active

07045852

ABSTRACT:
A method to improve the coupling ratio between a control gate (18) and a floating gate (14) of a floating gate non-volatile semiconductor device is described. In a stacked gate floating gate transistor according to the invention, a conductive spacer (24) is used at both sides of the stack. The conductive spacer (24) is galvanically connected to the control gate (18), preferably by means of a conductive layer (34), whereas it is separated from the floating gate (14) by means of an insulating layer (22). The capacitance (C1, C2) between both conductive spacers (24) and the side walls of the floating gate (14) adds up to the normal capacitance between control gate (18) and floating gate (14).

REFERENCES:
patent: 5284784 (1994-02-01), Manley
patent: 5576232 (1996-11-01), Hong
patent: 5650345 (1997-07-01), Ogura et al.
patent: 6204122 (2001-03-01), Joo et al.

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