Floating gate FGPA cell with separated select device

Details Floating gate FGPA cell with separated select device Floating gate FGPA cell with separated select device

1996-08-27

1998-06-30

Prenty, Mark V.

Active solid-state devices (e.g., transistors, solid-state diode

Field effect device

Having insulated electrode

257321, H01L 29788

Patent

active

057738629

ABSTRACT:
The present invention provides for a programming portion of an FPGA cell of an integrated circuit and a process of manufacturing the programming portion. The programming portion has an EPROM transistor and a separated select transistor with the gate of the select transistor connected to the control gate of the EPROM transistor. Both transistors share a common N+ source/drain region, which is self-aligned with the gates of both transistors. With the select transistor separated from the EPROM transistor and the self-aligned common N+ region, the threshold voltage V.sub.T of the select transistor can be set precisely. This allows good control over the programming voltage for the control gate of the EPROM transistor and the time to program the floating gate of the EPROM transistor.

REFERENCES:
patent: 5569945 (1996-10-01), Hong

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