Floating body-type DRAM cell with increased capacitance

Active solid-state devices (e.g. – transistors – solid-state diode – Field effect device – Having insulated electrode

Reexamination Certificate

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C257S348000

Reexamination Certificate

active

11044348

ABSTRACT:
A semiconductor memory device includes transistors, each including a first-conductivity-type semiconductor layer formed on a semiconductor substrate via a first insulating film, a second-conductivity-type source/drain regions formed in the semiconductor layer, a first-conductivity-type body region formed between the source region and the drain region in the semiconductor layer, the body region being electrically floating, and a gate electrode formed on a surface of a central portion of the body region via a second insulating film. In a section along a word line, which connects the gate electrodes together, a length of a boundary between the central portion of the body region and the second insulating film is smaller than a length of a boundary between the body region and the first insulating film. A second-conductivity-type counter impurity is doped in a surface portion of the central portion of the body region on which the second insulating film is formed.

REFERENCES:
patent: 5936278 (1999-08-01), Hu et al.
patent: 6229188 (2001-05-01), Aoki et al.
patent: 6538916 (2003-03-01), Ohsawa
patent: 6545318 (2003-04-01), Kunikiyo
patent: 6548848 (2003-04-01), Horiguchi et al.
patent: 2006/0049444 (2006-03-01), Shino
patent: 2002-246571 (2002-08-01), None
patent: 2002-343886 (2002-11-01), None
patent: 2005-158869 (2005-06-01), None
U.S. Appl. No. 11/616,124, filed Dec. 26, 2006, Shino.

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