Floating-body DRAM using write word line for increased...

Details Floating-body DRAM using write word line for increased... Floating-body DRAM using write word line for increased...

2006-04-18

2006-04-18

Hoang, Huan (Department: 2827)

Static information storage and retrieval

Read/write circuit

Including reference or bias voltage generator

C365S177000, C365S105000

Reexamination Certificate

active

07031203

ABSTRACT:
A DRAM memory cell uses a single transistor to perform the data storage and switching functions of a conventional cell. The transistor has a floating channel body which stores a potential that corresponds to one of two digital data values. The transistor further includes a gate connected to a first word line, a drain connected to a second word line, and a source connected to a bit line. By setting the word and bit lines to specific voltage states, the channel body stores a digital one potential as a result of impact ionization and a digital zero value as a result of forward bias of body-to-source junction.

REFERENCES:
patent: 2003/0231521 (2003-12-01), Ohsawa
patent: 2005/0063224 (2005-03-01), Fazan et al.
Takashi Ohsawa et al., Memory Design Using One Transistor Gain Cell on SOI, ISSCC 2002, Session 9, Dram and Ferrolelectric Memoirs, 3 pgs.

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