Floating-body DRAM using write word line for increased...

Details Floating-body DRAM using write word line for increased... Floating-body DRAM using write word line for increased...

2005-06-07

2005-06-07

Hoang, Huan (Department: 2818)

Static information storage and retrieval

Read/write circuit

Including reference or bias voltage generator

C365S149000, C365S189011

Reexamination Certificate

active

06903984

ABSTRACT:
A DRAM memory cell uses a single transistor to perform the data storage and switching functions of a conventional cell. The transistor has a floating channel body which stores a potential that corresponds to one of two digital data values. The transistor further includes a gate connected to a first word line, a drain connected to a second word line, and a source connected to a bit line. By setting the word and bit lines to specific voltage states, the channel body stores a digital one potential as a result of impact ionization and a digital zero value as a result of forward bias of body-to-source junction.

REFERENCES:
patent: 5877978 (1999-03-01), Morishita et al.
patent: 6341087 (2002-01-01), Kunikiyo
Takashi Ohsawa et al. “Memory Design Using One-Transistor Gain Cell on SOI,” ISSCC 2002, Session 9, Dram and Ferrorelectric Memoirs.

Affiliated with

Also associated with

Rating

Floating-body DRAM using write word line for increased... does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Floating-body DRAM using write word line for increased..., we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Floating-body DRAM using write word line for increased... will most certainly appreciate the feedback.

Rate now

Comments { 0 }

Profile ID: LFUS-PAI-O-3517722