Flip-flop circuit and frequency divider using the flip-flop...

Electronic digital logic circuitry – Function of and – or – nand – nor – or not

Reexamination Certificate

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C327S218000

Reexamination Certificate

active

07417466

ABSTRACT:
In a flip-flop circuit where latched complementary signals of first and second output terminals are inverted by complementary first and second input pulses, the conductivity of a first load transistor connected to the first output terminal is controlled by the signal from the second output terminal, and the conductivity of a second load transistor connected to the second output terminal is controlled by the signal from the first output terminal.

REFERENCES:
Author: Krishnapura, Nagendra and Kinget, Peter□□Title: A 5.3 GHz Programmable Divider for HiPerLAN in 0.25uM CMOS□□Date:Jul. 2000□□Publisher: IEEE Journal of Solid-state Circuit□□Vol. 35, No. 7□□Pertinent pp. 1019-1024□□.
Krishnapura, N and Kinget, P, A 5.3-GHz Programmable Divider for HiPerLAN in 0.25-um CMOS, IEEE Journal of Solid-State Circuits, vol. 35, No. 7, Jul. 2000, pp.1019-1024.

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