Flip chip with novel power and ground arrangement

Active solid-state devices (e.g. – transistors – solid-state diode – Combined with electrical contact or lead – Flip chip

Reexamination Certificate

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Details

C257S355000, C257S691000, C257S692000, C257S207000, C257S786000

Reexamination Certificate

active

06861762

ABSTRACT:
A flip chip assembly comprising a semiconductor die having a core area and a periphery area. The periphery area including an ESD structure. The semiconductor die includes at least one power conductor to supply power between the core area and the periphery. A substrate is coupled to the semiconductor die via a plurality of electrically conductive bumps. A first connection circuit is located within the semiconductor die core area to couple power between the substrate and the semiconductor die power conductor. An electrically conductive bump provides a connection between the first connection circuit and the substrate. The ESD structure is coupled to the first connection circuit.

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