Flip chip type quad flat non-leaded package

Details Flip chip type quad flat non-leaded package Flip chip type quad flat non-leaded package

2000-12-22

2003-01-14

Chaudhuri, Olik (Department: 2814)

Active solid-state devices (e.g., transistors, solid-state diode

Combined with electrical contact or lead

Flip chip

C257S673000, C257S675000, C257S796000

Reexamination Certificate

active

06507120

ABSTRACT:

BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to a structure of a quad flat non-leaded package. More particularly, the present invention relates to a quad flat non-leaded package using flip chip technology.
2. Description of the Related Art
In the current integrated circuit device, features such as high integrity, high density, compact size and multifunction are required more and more seriously. They are also needed in the development of the semiconductor manufacturing process and subsequent package process. For the semiconductor manufacture process, a semiconductor device having the line width of 0.18 micrometer has been put into mass production. The system on chip (SOC) also has been developed in sequence. Many high-density package structures, such as chip scale package (CSP), and multi chip module (MCM) have been manufactured in a corresponding way.
A quad flat non-leaded package (QFN) developed by Matsusita company is a common leadframe based CSP using a leadframe as a package carrier. A leadless CSP has advantages such as short signal transmitting trace and reduced signal loss, which has been used as a common package structure for a low pin count semiconductor device.
Referring to
FIG. 1
, a cross sectional view of a quad flat non-leaded package in the prior art is shown. A leadframe of a conventional quad flat non-leaded package
100
consists of a die pad
102
and a plurality of leads
104
arranged along the periphery thereof The back surface
108
b
of a die
108
is attached to the top surface
102
a
of the die pad
102
by the silver paste
106
. A bonding pad
114
on the active surface
108
a
of the die
108
is electrically connected to the top surfaces
104
a
of the leads
104
by gold wires. The die
108
, the gold wires
110
, the top surface
102
a
of the die pad
102
, the top surfaces
104
a
of the leads are encapsulated with molding compound, exposing the bottom surface
102
b
of the die pad
102
and the bottom surfaces
104
b
of the leads
104
. The package is connected to a printed circuit board (not shown) outside by the bottom surfaces
104
b
of the leads
104
.
The connection of bonding pads and leads in a conventional quad flat non-leaded package is achieved by gold wires. It is necessary to arrange the leads in the periphery of a die to keep an appropriate distance of about 15-30 mil so as to enlarge the area of the package. It needs to keep a certain distance from the top ends of the gold wires when encapsulating the gold wires, resulting in increased thickness of the package. Meanwhile, the signal transmission path becomes longer because of the connection made by the gold wires, resulting in reduced signal transmitting performance in the package, and signal delay and decay.
SUMMARY OF THE INVENTION
It is an object of the present invention to provide a flip chip type quad flat non-leaded package which can reduce the area and the thickness of the package and increase the density of the package.
It is another object of the present invention to provide a flip chip type quad flat non-leaded package which can improve the heat dissipating effect for the package and the quality of the product.
In order to achieve the above and other purposes of the present invention, a flip chip type quad flat non-leaded package for this invention is disclosed. A plurality of leads, each having a first surface and a second surface opposite to the first surface; a die having an active surface and a backside opposite the active surface, wherein the active surface has a plurality of bonding pads, each having a bump, and wherein each bump is connected to the first surface of one of the leads respectively; and a molding compound encapsulating the leads and the die, exposing the second surfaces of the leads.
According to one perferred embodiment of the present invention, the molding compound optionally exposes the backside of the die. Also, a heatsink is optionally provided on the backside of the die to improve the heat dissipating performance. Further, a heatsink can be further provided on the active surface of the die to expose one surface thereof so as to improve the heat dissipating performance of the product as well.
Since the connection of the die and the leads in package according to the present invention is achieved by flip chip technology using even only a bump, the leads can be directly superimposed on the bonding pads of the die without any die pad. Therefore, the area and the thickness of the package are reduced. Furthermore, the die is connected to the leads by conductive bumps, resulting in shortened path for signal transmission and improved electric property of the package. A heatsink can be further provided on the backside or the active surface of the die to improve the heat dissipating effect and increase the quality of the product.


REFERENCES:
patent: 5212402 (1993-05-01), Higgins, III
patent: 5450283 (1995-09-01), Lin et al.
patent: 5663593 (1997-09-01), Mostafazadeh et al.
patent: 5731631 (1998-03-01), Yama et al.
patent: 5849608 (1998-12-01), Abe
patent: 5969947 (1999-10-01), Johnson et al.

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