Flip chip stacked package

Details Flip chip stacked package Flip chip stacked package

2007-11-06

2007-11-06

Pham, Hoai V (Department: 2814)

Active solid-state devices (e.g., transistors, solid-state diode

Combined with electrical contact or lead

Chip mounted on chip

C257S686000, C257S723000, C257SE25031, C257SE23042

Reexamination Certificate

active

10901038

ABSTRACT:
A flip chip stacked package mainly comprises a carrier, a lower chip, an upper chip, a plurality of bumps, a plurality of bonding wires and a supporter. The supporter is attached to the lower surface of the carrier via an adhesive and covers the opening of the carrier. Thus, the lower chip can be disposed in the opening. In addition, the lower chip is electrically flip-chip bonded to the upper chip via the bumps and electrically connected to the carrier via the bonding wires. Accordingly, the heat generated from the lower chip can be transmitted to outside via the supporter. Furthermore, the upper chip is directly exposed to outside so that the capability of the heat dissipation will be enhanced.

REFERENCES:
patent: 5925930 (1999-07-01), Farnworth et al.
patent: 6326696 (2001-12-01), Horton et al.
patent: 6469395 (2002-10-01), Nishihara et al.
patent: 6537848 (2003-03-01), Camenforte et al.
patent: 6906415 (2005-06-01), Jiang et al.
patent: 6921968 (2005-07-01), Chung

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