Active solid-state devices (e.g. – transistors – solid-state diode – Combined with electrical contact or lead – Flip chip
Patent
1994-12-23
1996-04-09
Hille, Rolf
Active solid-state devices (e.g., transistors, solid-state diode
Combined with electrical contact or lead
Flip chip
257 81, 257763, 257766, 257448, H01L 2348, H01L 2954, H01L 2960
Patent
active
055064515
ABSTRACT:
An N-InP buffer layer is deposited on an N.sup.+ -InP substrate, an InGaAs light-absorbing layer is deposited on the buffer layer, an N.sup.- -InP cap layer is deposited on the light-absorbing layer, and a P-type impurity region is formed in the light-absorbing layer and the cap layer. Next, a masking film is formed on the cap layer, and with this masking film serving as a mask, the cap layer, the light-absorbing layer, the buffer layer are etched, thus forming a P-type electrode forming region and an N-type electrode forming region. Next, an insulating film is provided for the periphery portion of the P-type impurity region of the cap layer. Electrode pads having a laminated structure is formed respectively on the P-type and N-type electrode forming regions, and a non-metal member is formed on the insulating film and on the surface, the periphery and the side surface of the electrode pad of the P-type electrode.
REFERENCES:
patent: 3716907 (1973-02-01), Anderson
patent: 4176443 (1979-12-01), Iannuzzi et al.
patent: 4258382 (1981-03-01), Harris
patent: 4651191 (1987-03-01), Ooue et al.
patent: 5239189 (1993-08-01), Lawrence
patent: 5247204 (1993-09-01), Yokoyama
patent: 5260603 (1993-11-01), Kamura et al.
patent: 5412249 (1995-05-01), Hyugaji et al.
patent: 5416359 (1995-05-01), Oda
Levine et al., "Solder Terminal for Semiconductor Devices", IBM Technical Disclosure Bulletin, vol. 27, No. 9, Feb. 1985, p. 5252.
Ahn et al., "Permalloy Solder Barrier for Devices with Gold Conductor Metallization", IBM Tech. Disc., vol. 20, No. 12, May 1978, p. 5317.
"Solder Bump Formation with Anti-Erosion Polyimide Brim", IBM Tech. Disc., vol. 36, No. 10, Oct. 1993, pp. 529-530.
Jadus, "Flip Chip Terminal for Semiconductor Devices", IBM Tech. Disc., vol. 21, No. 3, Aug. 1978, p. 1007.
Kito et al., "High-Speed Flip-Chip InP/InGaAs Avalanche . . . ", IEEE Photonics Technology Letters, vol. 3, No. 12, Dec. 1991.
Hille Rolf
Kabushiki Kaisha Toshiba
Williams Alexander Oscar
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