Flip chip semiconductor device having workpiece adhesion...

Active solid-state devices (e.g. – transistors – solid-state diode – Combined with electrical contact or lead – Flip chip

Reexamination Certificate

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Details

C257S783000, C257S753000, C257S773000, C257S789000, C257SE23069, C257SE23018, C438S109000

Reexamination Certificate

active

07808113

ABSTRACT:
A semiconductor device assembly (200) includes a workpiece (205) having a surface including a die attach region corresponding to regions under an integrated circuit (IC) die210. The die attach region of workpiece (205) includes non-noble metal surfaces (215) and a plurality of flip chip (PC) pads at pad locations (214). A solder mask layer (207) is on a surface of the workpiece (205) outside the die attach region. The non-noble metal surfaces (215) in the die attach region include an adhesion promoter layer (221), wherein the adhesion promoter layer221is absent from the plurality of PC pads (214). An integrated circuit (IC) die (210) having a plurality of bumps (211) bonded in a flip chip arrangement to the workpiece (205). An underfill material (232) fills a space between the bumped IC die (210) and the workpiece (205).

REFERENCES:
patent: 6586683 (2003-07-01), Arrington et al.
patent: 2002/0189853 (2002-12-01), Hsu

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