Semiconductor device manufacturing: process – Coating with electrically or thermally conductive material – To form ohmic contact to semiconductive material
Reexamination Certificate
1999-10-20
2001-08-14
Potter, Roy (Department: 2822)
Semiconductor device manufacturing: process
Coating with electrically or thermally conductive material
To form ohmic contact to semiconductive material
C438S108000, C438S613000
Reexamination Certificate
active
06274473
ABSTRACT:
TECHNICAL FIELD
The present invention relates to a method of making integrated circuits known as flip chips, and to a method of attaching flip chips to a substrate, typically a printed circuit board. The invention also includes a flip chip which has a unique structure resulting from the method of manufacture.
BACKGROUND OF THE INVENTION
A flip chip is generally defined as a chip mounted on a substrate by various interconnect materials and methods, which is characterized in that the active input-output area of the chip surface faces the substrate.
The classic flip chip technology is the IBM Controlled-Collapse Chip Connection (C4). This technology utilizes solder bumps deposited on solder wettable metal terminals on the chip and a matching footprint of solder wettable terminals on the substrate. The solder typically includes approximately 95% to 97% by weight of lead (Pb), with the remainder being made up by tin (Sn).
When mounting the chip to the substrate, the substrate is first prepared with solder flux and the chip is “flipped” onto the substrate with the solder bumps aligned with the substrate terminals. All of the solder joints are then formed simultaneously by reflowing (melting) the solder to achieve electrical connection. Residual flux is then removed using an appropriate solvent.
An underfill, or alternatively, an encapsulant material is then applied to the chip, and by capillary action, the space between the chip and the substrate is filled substantially completely by the underfill or encapsulant material. The chip and the substrate are then firmly bonded by curing the underfill or encapsulant material. The problem of large thermal mismatch between the chip and the substrate, which would otherwise cause solder fatigue problems, is reduced by an order of magnitude by the use of the underfill material or encapsulant between the flip chip and the substrate.
SUMMARY OF THE INVENTION
Applicants have determined that alpha particles which are emitted by the Pb
210
isotope, or other alpha emitters such as U
235
, U
238
(uranium) or Th
232
(thorium) isotopes, which are present in the solder bump, are available to deposit charge on “floating” nodes in the chip, or on sensitive silicon (Si) integrated circuit (IC) junctions or capacitances (parasitic or deliberate), changing IC device states in a non-destructive manner. This unwanted charge deposition creates so called “soft” errors in the operation of the chip. This is also known in the art as a “single event upset”.
For example, a single alpha particle passing through silicon loses energy by creating electron-hole pairs in the silicon. An electron-hole pair is created when an electron is displaced from its atom to another location, leaving behind a region with a net positive charge, known in the art as a “hole”. Each electron-hole pair in Si requires 3.3 eV for its creation, with the result that a single alpha particle which has an energy of 5 MeV has the potential of creating 150,000 electron-hole pairs. If these electron-hole pairs are created in an insensitive area of the semiconductor device, they will gradually recombine without any adverse effects. However, if the alpha particle passes through a sensitive area, for example, a region of high electric field such as a depletion layer in a p-n junction, the generation of the electron-hole pairs can either charge or discharge the p-n junction, resulting in a change of state of the p-n junction from a 0 to a 1 or vice versa. Such an error is known as a “soft” error, as the semiconductor device is returnable to its original configuration
Accordingly, the invention provides a method of making a flip chip package, and a flip chip package, in which sensitive Si junctions and floating nodes in the package are shielded from exposure to energetic alpha particles emitted by the solder bumps.
This is done by providing alpha particle absorbing material between the solder bumps and the sensitive devices, preferably by surrounding the solder bump with alpha particle absorbing material.
In a first embodiment of the invention, a suitable alpha particle absorbing material is included in the underfill or encapsulant material. Conventional underfill materials are epoxies loaded with silica, but neither epoxies nor silica are particularly effective alpha particle absorbers. Accordingly, the shielding of the sensitive junctions and nodes is accomplished in the first embodiment of the invention by including an elemental metallic absorber, provided with an insulating coating, in the underfill material. Alternatively, in the first embodiment of the invention, a heavy metal oxide or a heavy metal nitride could be included in the underfill material to absorb the alpha particles.
Alternatively, a suitable material can be deposited on the exterior surface of the solder bump after joining of the chip to the substrate.
Further, the exterior surface of the solder bump can be coated with a suitable alpha absorbing material prior to chip join.
By providing a flip chip package which is shielded from alpha particles in this manner, the logical operation of the chip is more reliable.
Other features of the invention are disclosed or apparent in the section entitled “BEST MODE OF CARRYING OUT THE INVENTION”
REFERENCES:
patent: 5965945 (1999-10-01), Miller et al.
patent: 5989224 (2000-03-01), Akram
patent: 6043429 (2000-03-01), Akram
“Thick Film Technology and Chip Joining”, pp. 100-153, Lewis F. Miller, International Business Machines Corporation, 1972.
“Flip Chip Technologies”, pp. 24-83 and 415-491, John H. Lau, 1995.
“Microchip Fabrication—A Practical Guide to Semiconductor Processing”, pp. 191-309 and 549-605, Peter Van Zant, Third Edition, 1997.
Blish II Richard C.
Ruttenberg Frank
Advanced Micro Devices , Inc.
LaRiviere Grubman & Payne, LLP
Potter Roy
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